R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 363

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
17. Hardware LIN
The hardware LIN performs LIN communication in cooperation with timer RA and UART0.
17.1
Figure 17.1
RXD0 pin
TXD0 pin
The hardware LIN has the following features.
Figure 17.1 shows a Block Diagram of Hardware LIN.
[Master mode]
[Slave mode]
•
•
•
•
•
•
Generates Synch Break
Detects bus collision
Detects Synch Break
Measures Synch Field
Controls Synch Break and Synch Field signal inputs to UART0
Detects bus collision
NOTE:
Features
1. The WakeUp function is detected by INT1.
[Legend]
LINE, MST, SBE, LSTART, BCIE, SBIE, SFIE: LINCR register bits
TIOSEL: TRAIOC register bit
TE: U0C1 register bit
Hardware LIN
LSTART bit
Block Diagram of Hardware LIN
LINE bit
SBE bit
Page 345 of 458
RXD0 input
control
circuit
Synch Field
control
circuit
TIOSEL = 0
TIOSEL = 1
Bus collision
detection
circuit
MST bit
and SFIE bits
BCIE, SBIE,
RXD data
Interrupt
control
circuit
Timer RA output pulse
UART0 transfer clock
UART0 TXD data
UART0 TE bit
underflow signal
Timer RA
Timer RA
UART0
17. Hardware LIN
Timer RA
interrupt