R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 481

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
0.20
REVISION HISTORY
Jun 28, 2006
Date
158 to 160 Table 14.12 Pin Functions TRDIOA0/TRDCLK(P2_0)
Page
146
149
153
157
162
163
164
165
166
Table 14.8 Programmable Waveform Generation Mode Specifications,
“Write to Timer” in the item;
Table 14.9 Programmable One-Shot Generation Mode Specifications,
“Write to Timer” in the item;
Table 14.10 Programmable Wait One-Shot Generation Mode
Specifications, “Write to Timer” in the item;
Table 14.11 Timer RD Operation Clocks;
On the 5th line below the Table 14.11;
Table 14.13 Pin Functions TRDIOB0(P2_1)
Table 14.14 Pin Functions TRDIOC0(P2_2)
Table 14.15 Pin Functions TRDIOD0(P2_3)
Table 14.16 Pin Functions TRDIOA1(P2_4)
Table 14.17 Pin Functions TRDIOB1(P2_5)
Table 14.18 Pin Functions TRDIOC1(P2_6)
Table 14.19 Pin Functions TRDIOD1(P2_7)
Table 14.20 Pin Functions INT0(P4_5) added.
14.3.1 Mode Selection deleted
Table 14.21 Count Source Selection;
Figure 14.29 Block Diagram of Count Source;
Figure 14.30 Buffer Operation in Input Capture Function revised.
Figure 14.31 Buffer Operation in Output Compare Function revised.
On the 4th line below the Figure 14.31;
On the 7th line below the Figure 14.31;
On the 8th line below the Figure 14.31;
Below the Figure 14.32 Synchronous Operation;
14.3.4 Pulse Output Forced Cutoff, on the 13th line;
On the 15th line;
On the 2nd line from the bottom;
R8C/20 Group, R8C/21 Group Hardware Manual
“TRAPRE” → “TRBPRE” corrected.
“TRAPRE” → “TRBPRE” corrected.
“TRAPRE” → “TRBPRE” corrected.
“TPSC2” → “TCK2” and “TRSC0” → “TCK0” revised.
“(Pin output ~ detection)” added.
Selection of f1, f2, f4, f8, f32, and fOCO40M revised.
“TPSC2 to TPSC0” → “TCK2 to TCK0” revised.
“IOC2 to IOC0 bits” → “IOC2 bit” and “IOA2 to IOA0 bits” → “IOA2 bit”
revised.
“IOD2 to IOD0 bits” → “IOD2 bit” and “IOB2 to IOB0 bits” → “IOB2 bit”
revised.
“Bits IMFC ~ capture function” added.
“For the synchronous ~ register=110b)” deleted.
“P2D” → “PD2” corrected.
“P4_5 bit in the P4D register” → “PD4_5 bit in the PD4 register”
corrected.
“According to ~ of interrupts” added.
C - 5
Description
Summary