R5F2121AJFP#U0 Renesas Electronics America, R5F2121AJFP#U0 Datasheet - Page 92

• Manufacturer Part Number: R5F2121AJFP#U0
• Description: MCU FLASH 96K 5K CMOS 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F2121AJFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/20 Group, R8C/21 Group
Rev.2.00 Aug 27, 2008
REJ09B0250-0200
10.4
10.4.1
Table 10.2
−
High-speed
clock mode
High-speed
on-chip
oscillator
mode
Low-speed
on-chip
oscillator
mode
: can be 0 or 1, no change in outcome.
There are three power control modes. All modes other than wait and stop modes are referred to as standard
operating mode.
10.4.1.1
10.4.1.2
Standard operating mode is further separated into three modes.
In standard operating mode, the CPU clock and the peripheral function clock are supplied to operate the CPU
and the peripheral function clocks. Power consumption control is enabled by controlling the CPU clock
frequency. The higher the CPU clock frequency, the more processing power increases. The lower the CPU
clock frequency, the more power consumption decreases. When unnecessary oscillator circuits stop, power
consumption is further reduced.
Before the clock sources for the CPU clock can be switched over, the new clock source after switching needs to
be stabilized and oscillated. If the new clock source is the XIN clock, allow sufficient wait time in a program
until an oscillation is stabilized before exiting.
The XIN clock divided-by-1 (no division), -2, -4, -8, or -16 provides the CPU clock. Set the CM06 bit to 1
(divide-by-8 mode) when transiting to high-speed on-chip oscillator mode, low-speed on-chip oscillator mode.
If the CM14 bit is set to 0 (low-speed on-chip oscillator on) or the FRA00 bit in the FRA0 register is set to 1
(high-speed on-chip oscillator on), the fOCO can be used for timers RA.
When the FRA00 bit is set to 1, fOCO40M can be used for timer RD.
When the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used for the watchdog timer
and voltage detection circuit.
The high-speed on-chip oscillator is used as the on-chip oscillator clock when the FRA00 bit in the FRA0
register is set to 1 (high-speed on-chip oscillator on) and the FRA01 bit in the FRA0 register is set to 1. The on-
chip oscillator divided-by-1 (no division), -2, -4, -8 or -16 provides the CPU clock. Set the CM06 bit to 1
(divide-by-8) when transiting to high-speed clock mode.
If the FRA00 bit is set to 1, fOCO40M can be used for timer RD.
When the CM14 bit is set to 0 (low-speed on-chip oscillator on), fOCO-S can be used for the watchdog timer
and voltage detection circuit.
Power Control
Modes
Standard Operating Mode
No division
Divide-by-2
Divide-by-4
Divide-by-8
Divide-by-16
No division
Divide-by-2
Divide-by-4
Divide-by-8
Divide-by-16
No division
Divide-by-2
Divide-by-4
Divide-by-8
Divide-by-16
High-Speed Clock Mode
High-Speed On-Chip Oscillator Mode
Settings and Modes of Clock Associated Bits
Page 74 of 458
OCD Register
OCD2
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
CM17, CM16
00b
01b
10b
00b
01b
10b
00b
01b
10b
11b
11b
11b
−
−
−
CM1 Register
CM14
−
−
−
−
−
−
−
−
−
−
0
0
0
0
0
CM13
1
1
1
1
1
−
−
−
−
−
−
−
−
−
−
CM06
CM0 Register
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
10. Clock Generation Circuit
CM05
0
0
0
0
0
−
−
−
−
−
−
−
−
−
−
FRA01
FRA0 Register
−
−
−
−
−
1
1
1
1
1
0
0
0
0
0
FRA00
−
−
−
−
−
1
1
1
1
1
−
−
−
−
−