MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 1162

• Manufacturer Part Number: MC9S12DT256MPVE
• Description: IC MCU 256K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12DT256MPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, I²C, SCI, SPI
• Peripherals: PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.25 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12D
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 1
• Operating Supply Voltage: 5 V to 2.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68KIT912DP256
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• No. Of I/o's: 91
• Eeprom Memory Size: 4KB
• Ram Memory Size: 12KB
• Cpu Speed: 25MHz
• No. Of Timers: 1
• No. Of Pwm Channels: 8
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1)
28.3.2.9
The FADDRHI and FADDRLO registers are the Flash address registers.
All FADDRHI and FADDRLO bits are readable but are not writable. After an array write as part of a
command write sequence, the FADDR registers will contain the mapped MCU address written.
28.3.2.10 Flash Data Registers (FDATA)
The FDATAHI and FDATALO registers are the Flash data registers.
1164
NV[6:0]
Reset
Reset
Reset
Field
6:0
W
W
W
R
R
R
Nonvolatile Bits — The NV[6:0] bits are available as nonvolatile bits. Refer to the Device User Guide for proper
use of the NV bits.
Flash Address Registers (FADDR)
0
0
0
7
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 28-17. Flash Address Low Register (FADDRLO)
0
Figure 28-16. Flash Address High Register (FADDRHI)
0
0
6
6
6
Figure 28-18. Flash Data High Register (FDATAHI)
Table 28-17. FCTL Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
0
5
5
5
0
0
0
4
4
4
FADDRLO
FADDRHI
FDATAHI
Description
0
0
0
3
3
3
0
0
0
2
2
2
Freescale Semiconductor
0
0
0
1
1
1
0
0
0
0
0
0