MC9S12DT256MPVE Freescale Semiconductor, MC9S12DT256MPVE Datasheet - Page 1248

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12DT256MPVE

Manufacturer Part Number
MC9S12DT256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12DT256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.25 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12D
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
5 V to 2.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68KIT912DP256
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 10-bit)
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
12KB
Cpu Speed
25MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Appendix A Electrical Characteristics
Table A-9. shows the configuration of the peripherals for run current measurement.
1250
Table A-9. Peripheral Configurations for Run Supply Current Measurements
Peripheral
MSCAN
XGATE
PWM
COP
DBG
ECT
ATD
SCI
SPI
RTI
API
PIT
IIC
MC9S12XDP512 Data Sheet, Rev. 2.21
the module is configured to run from
PIT is enabled, Micro-timer register 0
the peripheral shall be configured to
configured to loop-back mode using
reads the Status and Flag registers
and does some bit manipulation on
covers all the code executed by the
continously transmit data (0x55) at
of CAN’s, SPI’s, SCI’s in sequence
trigger in outside range. The range
continously transmit data (0x55 or
continously transmit data (0x55 or
accumulator and modulus counter
configured to toggle its pins at the
operate at its maximum specified
XGATE runs in an infinite loop , it
0xAA) at the bit rate of 100Kbit/s
XGATE fetches code from RAM,
and 1 loaded with $0F and timer
registers 0 to 3 are loaded with
the RC oscillator clock source.
the module is enabled and the
comparators are configured to
frequency and to continuously
the peripheral is configured to
enabled, RTI Control Register
output compare mode, Pulse
operate in master mode and
convert voltages on all input
configured to master mode,
configured into loop mode,
COP Warchdog Rate 2
channels in sequence.
speed of 57600 baud
(RTICTL) set to $FF
a bit rate of 1Mbit/s
0xAA) at 1Mbit/s
Configuration
$03/07/0F/1F.
rate of 40kHz
enabled.
the data
core.
24
Freescale Semiconductor

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