M30835FJGP#U3 Renesas Electronics America, M30835FJGP#U3 Datasheet - Page 247

• Manufacturer Part Number: M30835FJGP#U3
• Description: IC M32C/83 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30835FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 121
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
. v
3
J
Figure 16.30 SIM Interface Connection
Figure 16.31 Parity Error Signal Output Timing (LSB First)
0
2
16.7.1 Parity Error Signal
1
9
C
3 .
B
8 /
0
1
16.7.1.1 Parity Error Signal Output Function
16.7.1.2 Parity Error Signal
0
3
3
J
G
When the UiERE bit in the UiC1 register (i=0 to 4) is set to "1", the parity error signal can be output.
The parity error signal is output when a parity error is detected upon receiving data. TxDi outputs an
"L" signal in the timing shown in Figure 16.31. When reading the UiRB register during a parity error
output, the PER bit in the UiRB register is set to "0" and TxDi again outputs an "H" signal simulta-
neously.
To determine whether the parity error signal is output, the port that shares a pin with RxDi is read by
using a transmit complete interrupt routine.
4
a
0 -
n
o r
Complete Flag
3 .
NOTES:
1
u
, 1
3
1. The above applies to direct format conditions (PRY=1, UFORM=0, UiLCH=0).
p
1
2
(
Recieve
M
0
0
3
RxDi
6
TxDi
2
C
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8 /
, 3
"H"
"H"
"L"
"L"
"1"
"0"
M
Microcomputer
3
2
C
f o
8 /
4
8
3
ST
8
) T
RxD
TxD
D
0
i
i
D
1
D
2
Hi-Z
D
3
D
4
D
5
SIM card
i=0 to 4
D
6
D
7
16. Serial I/O (Special Function)
P
ST : Start bit
P : Even parity
SP : Stop bit
i=0 to 4
SP