AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 222
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AT91RM9200-CI-002
Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91RM9200-EK.pdf
(41 pages)
2.AT91RM9200-DK.pdf
(2 pages)
3.AT91RM9200-QU-002.pdf
(701 pages)
Specifications of AT91RM9200-CI-002
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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Manufacturer
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Figure 20-6. Burst Suspend and Resume with Signal Control Address Advance
222
Selection Signal
Internal BFC
AT91RM9200
BFAVD
BFBAA
A[24:0]
D[15:0]
D[15:0]
Output
BFWE
BFOE
BFCS
BFCK
Input
Burst Suspend and Resume (BFOEH = 1)
Signal Control Address Advance (BAAEN = 1)
(1) Only if Multiplexed Address & Data Buses
These protocols are illustrated in
Valid Latency AVL+1
ber of cycles from the first rising clock edge when BFAVD is asserted to the rising edge that
causes the read of data D1.
Note:
Address (1)
2. In case of sequential access, and provided that the BFOEH mode is selected in the
Address (D0)
This new address is registered in the BFC and is then used as reference for further
accesses.
mode register
burst address is incremented:
– Through the BFBAA pin, if the Signal Controlled Address Advance is enabled.
– By enabling the clock during one clock cycle in Clock Controlled Address Advance
Mode.
This rising edge is also used to latch D0 in the BFC.
AVL
See “Burst Flash Controller Mode Register” on page
See “Burst Flash Controller Mode Register” on page 227.
Sampling
D0
D0
Sampling
D1
D1
Figure 20-6
Sampling
D2
D2
Sampling
D3
D3
Address Valid Latency = 4 BFCK cycles (AVL field = 3)
Output Enable Latency (OEL) = 2 BFCK cycles
below and
D4
Burst Suspend
Figure 20-7 on page
OEL = 2
Sampling
227., the internal
Burst Resume
D4
D4
1768I–ATARM–09-Jul-09
223. The Address
Sampling
D5
gives the num-
D5
D6
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