AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 487

• Manufacturer Part Number: AT91RM9200-CI-002
• Description: IC ARM9 MCU 256 BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-CI-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

32.3
32.4
32.4.1
32.4.2
32.4.3
32.5
32.5.1
32.5.1.1
32.5.1.2
1768I–ATARM–09-Jul-09
Pin Name List
Product Dependencies
Functional Description
I/O Lines
Power Management
Interrupt
TC Description
16-bit Counter
Clock Selection
Table 32-2.
For further details on the Timer Counter hardware implementation, see the specific Product
Properties document.
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
The programmer must first program the PIO controllers to assign the TC pins to their peripheral
functions.
The TC must be clocked through the Power Management Controller (PMC), thus the program-
mer must first configure the PMC to enable the Timer Counter.
The TC interface has an interrupt line connected to the Advanced Interrupt Controller (AIC).
Handling the TC interrupt requires programming the AIC before configuring the TC.
The three channels of the Timer Counter are independent and identical in operation. The regis-
ters for channel programming are listed in
Each channel is organized around a 16-bit counter. The value of the counter is incremented at
each positive edge of the selected clock. When the counter has reached the value 0xFFFF and
passes to 0x0000, an overflow occurs and the COVFS bit in TC_SR (Status Register) is set.
The current value of the counter is accessible in real time by reading the Counter Value Regis-
ter, TC_CV. The counter can be reset by a trigger. In this case, the counter value passes to
0x0000 on the next valid edge of the selected clock.
At block level, input clock signals of each channel can either be connected to the external inputs
TCLK0, TCLK1 or TCLK2, or be connected to the configurable I/O signals TIOA0, TIOA1 or
TIOA2 for chaining by programming the TC_BMR (Block Mode). See
Each channel can independently select an internal or external clock source for its counter:
Pin Name
TCLK0-TCLK2
TIOA0-TIOA2
TIOB0-TIOB2
• Internal clock signals: TIMER_CLOCK1, TIMER_CLOCK2, TIMER_CLOCK3,
TIMER_CLOCK4, TIMER_CLOCK5
Timer Counter pin list
External Clock Input
I/O Line A
I/O Line B
Description
Table 32-2 on page
487.
Type
Input
I/O
I/O
Figure
AT91RM9200
32-2.
487