AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 59

• Manufacturer Part Number: AT91RM9200-CI-002
• Description: IC ARM9 MCU 256 BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-CI-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

12. Debug and Test Features (DBG Test)
12.1
1768I–ATARM–09-Jul-09
Overview
The AT91RM9200 features a number of complementary debug and test capabilities. A common
JTAG/ICE (In-Circuit Emulator) port is used for standard debugging functions such as download-
ing code and single-stepping through programs. An ETM (Embedded Trace Macrocell) provides
more sophisticated debug features such as address and data comparators, half-rate clock
mode, counters, sequencer and FIFO. The Debug Unit provides a two-pin UART that can be
used to upload an application into internal SRAM. It manages the interrupt handling of the inter-
nal COMMTX and COMMRX signals that trace the activity of the Debug Communication
Channel.
A set of dedicated debug and test input/output pins give direct access to these capabilities from
a PC-based test environment.
Features of Debug and Test Features are:
• Integrated Embedded In-Circuit-Emulator
• Debug Unit
• Embedded Trace Macrocell: ETM9 Rev2a
• IEEE1149.1 JTAG Boundary Scan on all Digital Pins
– Two-pin UART
– Debug Communication Channel
– Chip ID Register
– Medium Level Implementation
– Half-rate Clock Mode
– Four Pairs of Address Comparators
– Two Data Comparators
– Eight Memory Map Decoder Inputs
– Two Counters
– One Sequencer
– One 18-byte FIFO
AT91RM9200
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