AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 525
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AT91RM9200-CI-002
Manufacturer Part Number
AT91RM9200-CI-002
Description
IC ARM9 MCU 256 BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91RM9200-EK.pdf
(41 pages)
2.AT91RM9200-DK.pdf
(2 pages)
3.AT91RM9200-QU-002.pdf
(701 pages)
Specifications of AT91RM9200-CI-002
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR
Number Of I /o
122
Program Memory Size
128KB (128K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
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33.7
33.7.1
1768I–ATARM–09-Jul-09
MultiMedia Card Operations
Command - Response Operation
width is one bit; setting it means that the width is four bits. In the case of multimedia cards, only
the data line 0 is used. The other data lines can be used as independent PIOs.
After a power-on reset, the cards are initialized by a special message-based MultiMedia Card
bus protocol. Each message is represented by one of the following tokens:
Card addressing is implemented using a session address assigned during the initialization
phase by the bus controller to all currently connected cards. Their unique CID number identifies
individual cards.
The structure of commands, responses and data blocks is described in the MultiMedia-Card
System Specification. See also
MultiMediaCard bus data transfers are composed of these tokens.
There are different types of operations. Addressed operations always contain a command and a
response token. In addition, some operations have a data token; the others transfer their infor-
mation directly within the command or response structure. In this case, no data token is present
in an operation. The bits on the DAT and the CMD lines are transferred synchronous to the clock
MCI Clock.
Two types of data transfer commands are defined:
Both read and write operations allow either single or multiple block transmission. A multiple
block transmission is terminated when a stop command follows on the CMD line similarly to the
sequential read.
The MCI provides a set of registers to perform the entire range of MultiMedia Card operations.
After reset, the MCI is disabled and becomes valid after setting the MCIEN bit in the MCI_CR
Control Register.
The PWSEN bit saves power by dividing the MCI clock by 2
The command and the response of the card are clocked out with the rising edge of the MCI
Clock.
All the timings for MultiMedia Card are defined in the MultiMediaCard System Specification.
• Command: A command is a token that starts an operation. A command is sent from the host
• Response: A response is a token which is sent from an addressed card or (synchronously)
• Data: Data can be transferred from the card to the host or vice versa. Data is transferred via
• Sequential commands: These commands initiate a continuous data stream. They are
• Block-oriented commands: These commands send a data block succeeded by CRC bits.
either to a single card (addressed command) or to all connected cards (broadcast
command). A command is transferred serially on the CMD line.
from all connected cards to the host as an answer to a previously received command. A
response is transferred serially on the CMD line.
the data line.
terminated only when a stop command follows on the CMD line. This mode reduces the
command overhead to an absolute minimum.
Table 33-4 on page
526.
PWSDIV
+ 1 when the bus is inactive.
AT91RM9200
525
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