AT91RM9200-CI-002 Atmel, AT91RM9200-CI-002 Datasheet - Page 562

• Manufacturer Part Number: AT91RM9200-CI-002
• Description: IC ARM9 MCU 256 BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91RM9200-CI-002

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR
• Number Of I /o: 122
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: ROM
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

Figure 34-7. Data IN Transfer for Ping-pong Endpoint
34.5.2.3
562
Data OUT Transaction Without Ping-pong Attributes
TXPKTRDY Flag
(USB_MCSRx)
FIFO (DPR)
USB Bus
Packets
TXCOMP Flag
(USB_CSRx)
Bank 0
FIFO (DPR)
Bank 1
AT91RM9200
Data OUT Transaction
Written by
Microcontroller
Microcontroller
Load Data IN Bank 0
Set by Firmware,
Data Payload Written in FIFO Bank 0
Warning: There is software critical path due to the fact that once the second bank is filled, the
driver has to wait for TX_COMP to set TX_PKTRDY. If the delay between receiving TX_COMP
is set and TX_PKTRDY is set is too long, some Data IN packets may be NACKed, reducing the
bandwidth.
Data OUT transactions are used in control, isochronous, bulk and interrupt transfers and con-
duct the transfer of data from the host to the device. Data OUT transactions in isochronous
transfers must be done using endpoints with ping-pong attributes.
To perform a Data OUT transaction, using a non ping-pong endpoint:
1. The host generates a Data OUT packet.
2. This packet is received by the USB device endpoint. While the FIFO associated to this
3. The microcontroller is notified that the USB device has received a data payload polling
4. The number of bytes available in the FIFO is made available by reading RXBYTECNT
Data IN
PID
endpoint is being used by the microcontroller, a NAK PID is returned to the host. Once
the FIFO is available, data are written to the FIFO by the USB device and an ACK is
automatically carried out to the host.
RX_DATA_BK0 in the endpoint’s UDP_CSRx register. An interrupt is pending for this
endpoint while RX_DATA_BK0 is set.
in the endpoint’s UDP_CSRx register.
Microcontroller Load Data IN Bank 1
USB Device Send Bank 0
Written by
Microcontroller
Data IN
Read by USB Device
Cleared by USB Device,
Data Payload Fully Transmitted
Set by USB
Device
ACK
PID
Interrupt Cleared by Firmware
Data IN
PID
Interrupt Pending
Microcontroller Load Data IN Bank 0
USB Device Send Bank 1
Written by
Microcontroller
Set by Firmware,
Data Payload Written in FIFO Bank 1
Read by USB Device
Data IN
Set by USB Device
1768I–ATARM–09-Jul-09
ACK
PID