ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 109

• Manufacturer Part Number: ADUC7032BSTZ-8V-RL
• Description: IC BATTERY SENSOR PREC 48-LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-8V-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: ADUC7032BSTZ-8V-RLCT

Preliminary Technical Data
UART Control Register 1:
Name :
Address :
Default Value :
Access :
Function :
Bit
7-6
5
4
3-0
UART Status Register 0:
Name :
Address :
Default Value :
Access :
Function :
Bit
7
6
5
4
3
2
1
0
Name
LOOPBACK
Name
TEMT
THRE
BI
FE
PE
OE
DR
COMCON1
0xFFFF0710
0x00
Read/Write
This 8-bit register controls the operation of the UART in conjunction with COMCON0
COMSTA0
0xFFFF0714
0x60
Read Only
This 8-bit read only register reflects the current status on the UART.
Description
UART Input Mux
00
01
10
11
Reserved
Loop back
Set by user to enable loop back mode. In loop back mode the TxD is forced high.
Reserved
Description
Reserved
COMTX empty status bit
Set automatically if COMTX is empty
Cleared automatically when writing to COMTX
COMTX and COMRX empty
Set automatically if COMTX and COMRX are empty
Cleared automatically when one of the register receives data
Break Indicator
Set when SIN is held low for more than the maximum word length
Cleared automatically
Framing error
Set when invalid stop bit
Cleared automatically
Parity error
Set when a parity error occurs
Cleared automatically
Overrun error
Set automatically if data are overwrite before been read
Cleared automatically
Data ready
Set automatically when COMRX is full
Cleared by reading COMRX
RxD driven by LIN Input
Reserved
RxD driven by GP5
Reserved
Table 72 : COMCON1 MMR Bit Descriptions
Table 73: COMSTA0 MMR Bit Descriptions
Rev. PrD | Page 109 of 128
Required for LIN Communications via LIN pin
Required for Serial communications via GP5 pin ( RxD )
ADuC7032