ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 92

• Manufacturer Part Number: ADUC7032BSTZ-8V-RL
• Description: IC BATTERY SENSOR PREC 48-LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-8V-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: ADUC7032BSTZ-8V-RLCT

Bit
31
30
29
28
27-26
25
24
23
22
21
20-18
17
16
15-7
6
5
4
3-2
Preliminary Technical Data
GPIO Port2 Data Register :
Name :
Address :
Default Value :
Access :
Function :
Description
Reserved
This bit is reserved and should be written as 0 by user code
Port 2.6 Direction Select Bit
This bit is cleared to 0 by user code to configure the GPIO pin assigned to P2.6 as an input.
This bit is set to 1 by user code to configure the GPIO pin assigned to P2.6 as an output.
Port 2.5 Direction Select Bit
This bit is cleared to 0 by user code to configure the GPIO pin assigned to P2.5 as an input.
This bit is set to 1 by user code to configure the GPIO pin assigned to P2.5 as an output. This configuration is used to support
diagnostic write capability to the high-voltage I/O pins.
Port 2.4 Direction Select Bit
This bit is cleared to 0 by user code to configure the GPIO pin assigned to P2.4 as an input. This configuration is used to support
diagnostic read-back capability from the high-voltage I/O pins(see HVCFG1[2:0]).
This bit is set to 1 by user code to configure the GPIO pin assigned to P2.4 as an output.
Reserved
These bits are reserved and should be written as 0 by user code
Port 2.1 Direction Select Bit
This bit is cleared to 0 by user code to configure the GPIO pin assigned to P2.1 as an input.
This bit is set to 1 by user code to configure the GPIO pin assigned to P2.1 as an output.
Port 2.0 Direction Select Bit
This bit is cleared to 0 by user code to configure the GPIO pin assigned to P2.0 as an input.
This bit is set to 1 by user code to configure the GPIO pin assigned to P2.0 as an output.
Reserved
This bit is reserved and should be written as 0 by user code
Port 2.6 Data Output
The value written to this bit appears directly on the GPIO pin assigned to P2.6
Port 2.5 Data Output
The value written to this bit appears directly on the GPIO pin assigned to P2.5.
Reserved
These bits are reserved and should be written as 0 by user code
Port 2.1 Data Output
The value written to this bit appears directly on the GPIO pin assigned to P2.1.
Port 2.0 Data Output
The value written to this bit appears directly on the GPIO pin assigned to P2.0.
Reserved
These bits are reserved and should be written as 0 by user code
Port 2.6 Data Input
This bit is a read-only bit that reflects the current status of the GPIO pin assigned to P2.6. User code should write 0 to this bit.
Port 2.5 Data Input
This bit is a read-only bit that reflects the current status of the GPIO pin assigned to P2.5. User code should write 0 to this bit.
Port 2.4 Data Input
This bit is a read-only bit that reflects the current status of the GPIO pin assigned to P2.4. User code should write 0 to this bit.
Reserved
These bits are reserved and should be written as 0 by user code
GP2DAT
0xFFFF0D40
0x00000000
This 32-bit MMR configures the direction of the GPIO pins assigned to Port2 (see Table 48). This register also sets
the output value for GPIO pins configured as outputs and reads the status of GPIO pins configured as inputs.
Read/Write
Table 54 :GP2DAT MMR Bit Descriptions
Rev. PrD | Page 92 of 128
ADuC7032