ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 59

• Manufacturer Part Number: ADUC7032BSTZ-8V-RL
• Description: IC BATTERY SENSOR PREC 48-LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7032BSTZ-8V-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 20.48MHz
• Connectivity: LIN, SPI, UART/USART
• Peripherals: POR, PSM, Temp Sensor, WDT
• Number Of I /o: 9
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 18 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: ADUC7032BSTZ-8V-RLCT

Preliminary Technical Data
Current Channel ADC Gain Calibration Register :
Name :
Address :
Default Value :
Access :
Function :
calibration coefficient for scaling the I-ADC conversion result.
The register is configured at power-on with a factory default
value. However, this register will be automatically overwritten if
aa gain calibration of the I-ADC is initiated by the user via bits
in the ADCMDE MMR. User code can only write to this
calibration register if the ADC is in idle mode. An ADC must
be enabled and in idle mode before written to any Offset or
Gain Register. A delay of 23us should be included before
ADCMDE is modified.
Voltage Channel Gain Calibration Register :
Name :
Address :
Default Value :
Access :
Function :
calibration coefficient for scaling a voltage channel conversion
result. The register is configured at power-on with a factory
default value. However, this register will be automatically
overwritten if a gain calibration of the voltage channel is
initiated by the user via bits in the ADCMDE MMR. User code
can only write to this calibration register if the ADC is in idle
mode. An ADC must be enabled and in idle mode before
written to any Offset or Gain Register. A delay of 23us should
be included before ADCMDE is modified.
Temperature Channel Gain Calibration Register :
Name :
Address :
Default Value :
Access :
Function :
calibration coefficient for scaling a temperature channel
conversion result. The register is configured at power-on with a
factory default value. However, this register will be
automatically overwritten if a gain calibration of the
temperature channel is initiated by the user via bits in the
ADCMDE MMR. User code can only write to this calibration
register if the ADC is in idle mode. An ADC must be enabled
and in idle mode before written to any Offset or Gain Register.
A delay of 23us should be included before ADCMDE is
modified.
ADC0GN
0xFFFF053C
Part Specific, factory programmed
Read/Write
This Gain MMR holds a 16-bit gain
ADC1GN
0xFFFF0540
Part Specific, factory programmed
Read/Write
This Gain MMR holds a 16-bit gain
ADC2GN
0xFFFF0544
Part Specific, factory programmed
Read/Write
This Gain MMR holds a 16-bit gain
Rev. PrD | Page 59 of 128
Current Channel ADC Result Counter Limit
Register:
Name :
Address :
Default Value :
Access :
Function :
conversions required before an ADC interrupt is generated. By
default this register is set to 0x01. The ADC counter function
must be enabled via the ADC Result Counter Enable bit in the
ADCCFG MMR.
Current Channel ADC Result Count Register:
Name :
Address :
Default Value :
Access :
Function :
current number of I-ADC conversion results. It is used in
conjunction with ADC0RCL to mask I-ADC interrupts,
generating a lower interrupt rate. Once ADC0RCV=ADC0RCL,
the value is ADC0RCV resets to 0 and recommences counting.
It can also be used in conjunction with the Accumulator
(ADC0ACC) to allow an average current calculation to be
undertaken. The result counter is enabled via ADCCFG[0].
This MMR is also reset to 0 when the I-ADC is reconfigured i.e.
when the ADC0CON or ADCMDE are written.
Current Channel ADC Threshold Register:
Name :
Address :
Default Value :
Access :
Function :
which the absolute value of the I-ADC conversion result is
compared. In Unipolar mode ADC0TH [15:0] are compared
and in 2’s compliment mode ADC0TH[14:0] are compared.
Current Channel ADC Threshold Count Limit
Register:
Name :
Address :
Default Value :
Access :
Function :
cumulative(given values below the threshold will decrement or
reset the count to 0) I-ADC conversion result readings above
ADC0TH must occur before the I-ADC Comparator Threshold
ADC0RCL
0xFFFF0548
0x0001
Read/Write
This 16-bit MMR sets the number of
ADC0RCV
0xFFFF054C
0x0000
Read Only
This 16-bit, Read Only MMR holds the
ADC0TH
0xFFFF0550
0x0000
Read/Write
This 16-bit MMR sets the threshold against
ADC0TCL
0xFFFF0554
0x01
Read/Write
This 8-bit MMR determines how many
ADuC7032