ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 33

IC BATTERY SENSOR PREC 48-LQFP

ADUC7032BSTZ-8V-RL

Manufacturer Part Number
ADUC7032BSTZ-8V-RL
Description
IC BATTERY SENSOR PREC 48-LQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7032BSTZ-8V-RL

Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
ADUC7032BSTZ-8V-RLCT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADUC7032BSTZ-8V-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Preliminary Technical Data
Command Sequence for executing a Mass Erase
Giving the significance of the ‘Mass Erase’ command, a
specific code sequence must be executed to initiate this
operation.
1.
2.
3.
4.
FEE0STA and FEE1STA Registers :
Name :
Address :
Default Value (both registers) :
Access :
Function :
Bit
15-4
3
2
1
0
FEE0ADR and FEE1ADR Registers:
Name :
Address :
Default Value :
Access :
Function :
Set bit 3 in FEExMOD.
Write 0xFFC3 in FEExADR
Write 0x3CFF in FEExDAT
Run the Mass Erase command 0x06 in FEExCON
Description (note x is 0 or 1 to designate Flash/EE Block 0 or 1)
Not Used
These bits are not used and will always read as 0.
Flash Interrupt Status Bit
Set automatically when an interrupt occurs, i.e. when a command is complete and the Flash/EE interrupt enable bit in the
FEExMOD register is set
Cleared automatically when the FEExSTA register is read by user code
Flash/EE controller busy
Set automatically when the Flash/EE controller is busy
Cleared automatically when the controller is not busy
Command fail
Set automatically when a command written to FEExCON completes unsuccessfully
Cleared automatically when the FEExSTA register is read by user code
Command Successful
Set automatically by MCU when a command is completed successfully.
Cleared automatically when the FEExSTA register is read by user code
These 8-bit read only registers can be read by user code and reflect the current status of the Flash/EE memory
controllers.
FEE0ADR and FEE1ADR
0xFFFF0E10 and 0xFFFF0E90
Non Zero
Read/Write Access
This 16-bit register dictates the address
upon which any Flash/EE command
executed via FEExCON will act upon.
FEE0STA and FEE1STA
0xFFFF0E00 and 0xFFFF0E80
0x00
ReadOnly
Table 12: FEE0STA and FEE1STA MMR bit designations
Rev. PrD | Page 33 of 128
This sequence is illustrated in the following example,:
FEExMOD= 0x08
FEExADR= 0xFFC3
FEExDAT= 0x3CFF
FEExCON= 0x06;
while (FEExSTA & 0x04){}
Note: To run the mass erase command via FEE0CON, Write
FEE0DAT and FEE1DAT Registers:
Name :
Address :
Default Value :
Access :
Function :
protection on the lower 64kbytes must be disabled, i.e.
FEE1HIDE/FEE1PRO are set to 0xFFFFFFFF.. This may
be done be first removing the protection or erasing the
lower 64kbytes first.
FEE0DAT and FEE1DAT
0xFFFF0E0C and 0xFFFF0E8C
Non Zero
Read/Write Access
This 16-bit register contains the data either
read from or to be written to the Flash/EE
memory.
//Wait for command to finish
// Mass-Erase command
ADuC7032

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