MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 167

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

At reset, these on-chip modules are configured to have only supervisor read/write access capabilities. If an
instruction fetch access to any of these peripheral modules is attempted, the IPS bus cycle is immediately
terminated with an error.
8.6.3.3
The on-chip peripheral space starting at IPSBAR is subdivided into sixteen 64-Mbyte regions. Each of the
first two regions has a unique access control register associated with it. The other fourteen regions are in
reserved space; the access control registers for these regions are not implemented. Bits [29:26] of the
address select the specific GPACRn to be used for a given reference within the IPS address space. These
access control registers are 8 bits in width so that read, write, and execute attributes may be assigned to the
given IPS region.
Freescale Semiconductor
IPSBAR Offset
Grouped Peripheral Access Control Registers (GPACR0 & GPACR1)
Read/Write
The access control for modules with memory space protected by
PACR0–PACR8 are determined by the PACR0–PACR8 settings. The access
control is not affected by GPACR0, even though the modules are mapped in
its 64-Mbyte address space.
Address
0x027
0x028
0x029
0x02a
0x02b
0x02d
0x02e
0x02c
Reset
Table 8-11. Peripheral Access Control Registers (PACRs) (continued)
Field
Figure 8-10. Grouped Peripheral Access Control Register (GPACR)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
LOCK
R/W
7
PACR3
PACR4
PACR5
PACR6
PACR7
PACR8
Name
—
—
6–4
—
R
IPSBAR + 0x030, IPSBAR + 0x31
NOTE
3
0000_0000
ACCESS_CTRL1
UART2
DTIM0
DTIM2
INTC0
FEC0
I
—
—
2
ACCESS_CTRL
C
Modules Controlled
R/W
ACCESS_CTRL0
System Control Module (SCM)
DTIM1
DTIM3
INTC1
QSPI
—
—
—
—
0
8-15