MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 757

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Prescaler divide (PRESDIV) bits 25-22
Processor status 30-2
Program counter 2-7
Programmable interrupt timers
Programming model
Pulse accumulator
PULSE instruction 30-3
Q
QADC
Freescale Semiconductor
operation
chip configuration module 27-3
debug 30-5
EPORT 7-1
power management 7-1
event counter mode 20-18
gated time accumulation 20-19
input interrupt 20-22
overflow interrupt 20-22
A/D converter
analog inputs 28-66
analog subsystem 28-31
analog supply
block diagram 28-2
boundary conditions 28-45
digital control subsystem 28-34
electrical characteristics
external multiplexing 28-29
features 28-1
interrupts
leakage 28-67
low-power control (LPCR) 7-4
low-power interrupt control (LPICR) 7-2
low-power modes 7-10
bias 28-34
block diagram 28-32
channel decode 28-33
comparator 28-33
cycle times 28-32
multiplexer 28-33
operation 28-31
sample buffer 28-33
state machine 28-34
filtering 28-61
grounding 28-61
absolute maximum ratings 33-8
operating conversion specifications 33-10
operating electrical specifications 33-9
operation 28-29
options 28-31
operation 28-68
sources 28-68
,
30-39
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
QSPI
memory map 28-6
operation
overview 28-1
periodic/interval timer 28-52
QCLK generation 28-52
queue priority 28-34
registers
result coherency 28-28
stress conditions 28-62
timing diagrams
baud rate 22-12
electrical characteristics
memory map 22-3
operation
programming example 22-15
RAM
continuous-scan 28-49
debug mode 28-2
disabled 28-47
low-power modes 7-11
reserved 28-47
single-scan 28-47
stop mode 28-3
control 2–0 (QACRn) 28-10
conversion command word (CCW) 28-24
left-justified signed result (LJSRR) 28-27
left-justified unsigned result (LJURR) 28-28
module configuration (QADCMCR) 28-7
port data (PORTQA and PORTQB) 28-8
port QA and QB data direction (DDRQA,
result word table 28-55
right-justified unsigned result (RJURR) 28-27
status 0–1 (QASRn) 28-17
successive approximation (SAR) 28-34
test (QADCTEST) 28-8
conversion in gated mode, continuous scan 28-60
conversion in gated mode, single scan 28-60
conversion timing 28-33
conversion timing, bypass mode 28-33
AC timing specifications 33-24
low-power modes 7-8
master mode 22-2
command 22-12
externally gated 28-51
externally triggered 28-50
periodic timer 28-51
software-initiated 28-50
externally gated 28-48
externally triggered 28-48
interval timer 28-49
software-initiated 28-48
DDRQB) 28-9
,
28-36
,
28-23
–
28-14
,
28-53
Index-9