MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 565

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

1
28.6.8
The result word table is a 64 half-word (128 byte) long by 10-bit wide RAM. An entry is written by the
QADC after completing an analog conversion specified by the corresponding CCW table entry.
28.6.8.1 Right-Justified Unsigned Result Register (RJURR)
28.6.8.2 Left-Justified Signed Result Register (LJSRR)
Freescale Semiconductor
All channels not listed are reserved or unimplemented and return undefined results.
15–10
Bit(s)
Address
9–0
Address
Reset
Reset
Reset
Reset
R/W:
R/W:
Field
R/W:
Field
R/W:
Field
Field
Result Registers
RESULT
15
15
Name
S
7
7
—
Figure 28-15. Right-Justified Unsigned Result Register (RJURR)
Figure 28-16. Left-Justified Signed Result Register (LJSRR)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
14
Reserved, should be cleared.
The conversion result is unsigned, right-justified data.
Table 28-18. RJURR Field Descriptions
IPSBAR + 0x19_0300, 0x19_037e
0000_00
IPSBAR + 0x19_0280, 0x19_02fe
—
R
Undefined
Undefined
Undefined
RESULT
RESULT
R/W
R/W
R/W
RESULT
Description
Queued Analog-to-Digital Converter (QADC)
10
9
Undefined
RESULT
R/W
8
8
0
0
28-27