MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 49

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

The supervisor programming model is to be used only by system control software to implement restricted
operating system functions, I/O control, and memory management. All accesses that affect the control
features of ColdFire processors are in the supervisor programming model, which consists of registers
available in user mode as well as the following control registers:
Freescale Semiconductor
Store: 0x188–8E
Load: 0x088–8E
Store: 0x182–7
Load: 0x082–7
0x806, 0x809,
0x80A, 0x80B
Store: 0x18F
Store: 0x180
Store: 0x181
Load: 0x08F
Load: 0x080
Load: 0x081
•
•
•
•
•
•
0x80E
BDM
0x804
0x805
0x807
0x808
— One 16-bit mask register (MASK)
— One 32-bit Status register (MACSR) including four indicator bits signaling product or
16-bit status register (SR)
32-bit supervisor stack pointer (SSP)
32-bit vector base register (VBR)
32-bit cache control register (CACR)
32-bit access control registers (ACR0, ACR1)
Two 32-bit memory base address registers (RAMBAR, FLASHBAR)
1
Accumulators and extension bytes can be loaded, copied, and stored, and results from EMAC
arithmetic operations generally affect the entire 48-bit destination.
accumulation overflow (one for each accumulator: PAV0–PAV3)
Data Register 0 (D0)
Data Register 1 (D1)
Data Register 2–7 (D2–D7)
Address Register 0–6 (A0–A6)
Supervisor/User A7 Stack Pointer (A7)
MAC Status Register (MACSR)
MAC Address Mask Register (MASK)
MAC Accumulators 0–3 (ACC0–3)
MAC Accumulator 0,1 Extension Bytes
(ACCext01)
MAC Accumulator 2,3 Extension Bytes
(ACCext23)
Condition Code Register (CCR)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Register
Table 2-1. ColdFire Core Programming Model
Supervisor/User Access Registers
Width
(bits)
32
32
32
32
32
32
32
32
32
32
8
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0xFFFF_FFFF
0xCF20_6080
0x13B0_1080
0x0000_0000
Reset Value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Written with
MOVEC
No
No
No
No
No
No
No
No
No
No
No
Section/Page
ColdFire Core
2.2.2/2-4
2.2.3/2-5
3.2.1/3-3
3.2.2/3-5
2.2.1/2-4
2.2.1/2-4
2.2.1/2-4
3.2.3/3-6
3.2.4/3-7
3.2.4/3-7
2.2.4/2-6
2-3