MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 63

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

All ColdFire processors inhibit interrupt sampling during the first instruction of all exception handlers.
This allows any handler to disable interrupts effectively, if necessary, by raising the interrupt mask level
contained in the status register. In addition, the ISA_A+ architecture includes an instruction (STLDSR)
that stores the current interrupt mask level and loads a value into the SR. This instruction is specifically
intended for use as the first instruction of an interrupt service routine that services multiple interrupt
requests with different interrupt levels. For more details, see ColdFire Family Programmer’s Reference
Manual.
2.3.3.1
Figure 2-16
and the 16-bit status register, and the second longword contains the 32-bit program counter address.
The 16-bit format/vector word contains three unique fields:
Freescale Semiconductor
•
•
SSP
+ 0x4
A 4-bit format field at the top of the system stack is always written with a value of 4, 5, 6, or 7 by
the processor, indicating a two-longword frame format. See
There is a 4-bit fault status field, FS[3:0], at the top of the system stack. This field is defined for
access and address errors only and written as zeros for all other exceptions. See
→
shows exception stack frame. The first longword contains the 16-bit format/vector word (F/V)
31 30 29 28 27
Exception Stack Frame Definition
Format
1
Fault refers to the PC of the instruction that caused the exception. Next refers to the PC
of the instruction that follows the instruction that caused the fault.
Number(s)
64–255
Vector
32–47
48–63
of Exception, Bits 1:0
Original SSP @ Time
FS[3:2]
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 2-5. Exception Vector Assignments (continued)
26 25 24 23 22 21 20 19 18 17
00
01
10
11
Figure 2-16. Exception Stack Frame Form
0x080–0x0BC
0x0C0–0x0FC
0x100–0x3FC
Offset (Hex)
Vector
Table 2-6. Format Field Encodings
Vector
Original SSP - 10
Original SSP - 11
Original SSP - 8
Original SSP - 9
Instruction of
SSP @ 1st
Handler
Program
Stacked
Counter
Program Counter
Next
Next
FS[1:0]
—
16 15 14 13 12 11 10 9
Device-specific interrupts
Trap # 0-15 instructions
Format Field
Table
Assignment
0100
0101
0110
0111
Reserved
Status Register
2-6.
8
7
6
5
Table
4
3
2-7.
ColdFire Core
2
1
0
2-17