S912XEQ384J3CAL Freescale Semiconductor, S912XEQ384J3CAL Datasheet - Page 1128

IC MCU 16BIT 384KB FLASH 112LQFP

S912XEQ384J3CAL

Manufacturer Part Number
S912XEQ384J3CAL
Description
IC MCU 16BIT 384KB FLASH 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S912XEQ384J3CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Core
HCS12X
Data Bus Width
16 bit
Data Ram Size
24 KB
Interface Type
SCI, SPI, I2C, CAN
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
3.13 V to 5.5 V
Maximum Operating Temperature
+ 260 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEQ384J3CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
28.4.2.15 Full Partition D-Flash Command
The Full Partition D-Flash command allows the user to allocate sectors within the D-Flash block for
applications and a partition within the buffer RAM for EEPROM access. The D-Flash block consists of
128 sectors with 256 bytes per sector.
1128
1. As defined by the memory map for FTM1024K5.
FERSTAT
Register
FSTAT
Field margin levels must only be used during verify of the initial factory
programming.
Field margin levels can be used to check that Flash memory contents have
adequate margin for data retention at the normal level setting. If unexpected
results are encountered when checking Flash memory contents at field
margin levels, the Flash memory contents should be erased and
reprogrammed.
MGSTAT1
MGSTAT0
EPVIOLIF
ACCERR
Table 28-62. Set Field Margin Level Command Error Handling
Error Bit
FPVIOL
1. Read margin to the erased state
2. Read margin to the programmed state
(CCOBIX=001)
Table 28-61. Valid Set Field Margin Level Settings
0x0002
0x0003
0x0004
CCOB
MC9S12XE-Family Reference Manual , Rev. 1.23
Set if CCOBIX[2:0] != 001 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Set if an invalid global address [22:16] is supplied
Set if an invalid margin level setting is supplied
None
None
None
None
CAUTION
NOTE
User Margin-0 Level
Field Margin-1 Level
Field Margin-0 Level
Level Description
Error Condition
(2)
1
2
(1)
Table
28-30)
Freescale Semiconductor

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