S912XEQ384J3CAL Freescale Semiconductor, S912XEQ384J3CAL Datasheet - Page 177

IC MCU 16BIT 384KB FLASH 112LQFP

S912XEQ384J3CAL

Manufacturer Part Number
S912XEQ384J3CAL
Description
IC MCU 16BIT 384KB FLASH 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S912XEQ384J3CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Core
HCS12X
Data Bus Width
16 bit
Data Ram Size
24 KB
Interface Type
SCI, SPI, I2C, CAN
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
3.13 V to 5.5 V
Maximum Operating Temperature
+ 260 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEQ384J3CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1. Read: Anytime.
1. Read: Anytime.
2.3.100 Port L Routing Register (PTLRR)
This register configures the re-routing of SCI7, SCI6, SCI5, and SCI4 on alternative ports.
2.3.101 Port F Data Register (PTF)
Freescale Semiconductor
Function
Address 0x0377
Address 0x0378
Write: Anytime.
Write: Anytime.
Altern.
Reset
Reset
W
W
R
R
PTLRR7
(TXD3)
PTF7
0
0
7
7
= Unimplemented or Reserved
PTLRR6
(RXD3)
PTFT6
0
0
6
6
Module
Figure 2-98. Port L Routing Register (PTLRR)
SCI7
SCI6
SCI5
SCI4
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-99. Port F Data Register (PTF)
Table 2-95. Port L Routing Summary
PTLRR5
(SCL0)
PTF5
0
0
5
5
7
0
1
x
x
x
x
x
x
PTLRR
6
x
x
0
1
x
x
x
x
PTLRR4
(SDA0)
5
x
x
x
x
0
1
x
x
PTF4
0
0
4
4
4
0
1
x
x
x
x
x
x
TXD
PH3
PH1
PH7
PH5
PL7
PL5
PL3
PL1
Related Pins
(CS3)
PTF3
3
0
0
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
RXD
PH2
PH0
PH6
PH4
PL6
PL4
PL2
PL0
(CS2)
PTF2
0
0
0
2
2
Access: User read/write
Access: User read/write
(CS1)
PTF1
0
0
0
1
1
(CS0)
PTF0
0
0
0
0
0
177
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