S912XEQ384J3CAL Freescale Semiconductor, S912XEQ384J3CAL Datasheet - Page 499

• Manufacturer Part Number: S912XEQ384J3CAL
• Description: IC MCU 16BIT 384KB FLASH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S912XEQ384J3CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Core: HCS12X
• Data Bus Width: 16 bit
• Data Ram Size: 24 KB
• Interface Type: SCI, SPI, I2C, CAN
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 1
• Operating Supply Voltage: 3.13 V to 5.5 V
• Maximum Operating Temperature: + 260 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

S12XECRG performs a quality check on the incoming clock signal. As soon as clock quality check
indicates a valid Oscillator Clock signal the reset sequence starts using the Oscillator clock. If after 50
check windows the clock quality check indicated a non-valid Oscillator Clock the reset sequence starts
using Self-Clock Mode.
Figure 11-22
and when the RESET pin is held low.
11.6
The interrupts/reset vectors requested by the S12XECRG are listed in
specification for related vector addresses and priorities.
Freescale Semiconductor
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Interrupts
and
Figure 11-23
Internal RESET
Internal RESET
RESET
Internal POR
RESET
Internal POR
Figure 11-22. RESET Pin Tied to V
Interrupt Source
Real time interrupt
LOCK interrupt
SCM interrupt
Figure 11-23. RESET Pin Held Low Externally
show the power-up sequence for cases when the RESET pin is tied to V
MC9S12XE-Family Reference Manual Rev. 1.23
Table 11-18. S12XECRG Interrupt Vectors
Mask
Clock Quality Check
(no Self-Clock Mode)
Clock Quality Check
(no Self Clock Mode)
CCR
I bit
I bit
I bit
128 SYSCLK
) (
) (
) (
128 SYSCLK
) (
) (
) (
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
64 SYSCLK
64 SYSCLK
DD
(by a Pull-up Resistor)
CRGINT (LOCKIE)
CRGINT (SCMIE)
CRGINT (RTIE)
Local Enable
Table
11-18. Refer to MCU
DD
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