S912XEQ384J3CAL Freescale Semiconductor, S912XEQ384J3CAL Datasheet - Page 236

• Manufacturer Part Number: S912XEQ384J3CAL
• Description: IC MCU 16BIT 384KB FLASH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S912XEQ384J3CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Core: HCS12X
• Data Bus Width: 16 bit
• Data Ram Size: 24 KB
• Interface Type: SCI, SPI, I2C, CAN
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 1
• Operating Supply Voltage: 3.13 V to 5.5 V
• Maximum Operating Temperature: + 260 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 4 Memory Protection Unit (S12XMPUV1)
4.3.1.2
Read: Anytime
Write: Never
4.3.1.3
Read: Anytime
Write: Never
236
Address: Module Base + 0x0001
Address: Module Base + 0x0002
ADDR[22:16]
ADDR[15:8]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
Field
6–0
7–0
W
W
R
R
MPU Address Status Register 0 (MPUASTAT0)
MPU Address Status Register 1 (MPUASTAT1)
Access violation address bits — The ADDR[22:16] bits contain bits [22:16] of the global address which
caused the current access violation interrupt. These bits are undefined if the access error flag bit (AEF) in the
MPUFLG register is not set.
Access violation address bits — The ADDR[15:8] bits contain bits [15:8] of the global address which caused
the current access violation interrupt. These bits are undefined if the access error flag bit (AEF) in the MPUFLG
register is not set.
0
0
0
7
7
Figure 4-4. MPU Address Status Register 0 (MPUASTAT0)
Figure 4-5. MPU Address Status Register 1 (MPUASTAT1)
0
0
6
6
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 4-4. MPUASTAT0 Field Descriptions
Table 4-5. MPUASTAT1 Field Descriptions
5
0
5
0
0
0
4
4
ADDR[15:8]
Description
Description
ADDR[22:16]
0
0
3
3
2
0
2
0
Freescale Semiconductor
0
0
1
1
0
0
0
0