S912XEQ384J3CAL Freescale Semiconductor, S912XEQ384J3CAL Datasheet - Page 482

• Manufacturer Part Number: S912XEQ384J3CAL
• Description: IC MCU 16BIT 384KB FLASH 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S912XEQ384J3CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Core: HCS12X
• Data Bus Width: 16 bit
• Data Ram Size: 24 KB
• Interface Type: SCI, SPI, I2C, CAN
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 1
• Operating Supply Voltage: 3.13 V to 5.5 V
• Maximum Operating Temperature: + 260 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
11.3.2.8
This register selects the timeout period for the Real Time Interrupt.
Read: Anytime
Write: Anytime
482
Module Base + 0x0007
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
RTR[6:4]
RTR[3:0]
RTDEC
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
6–4
3–0
0000 (÷1)
RTR[3:0]
7
W
R
RTDEC
Decimal or Binary Divider Select Bit — RTDEC selects decimal or binary based prescaler values.
0 Binary based divider value. See
1 Decimal based divider value. See
Real Time Interrupt Prescale Rate Select Bits — These bits select the prescale rate for the RTI. See
10
Real Time Interrupt Modulus Counter Select Bits — These bits select the modulus counter target value to
provide additional
RTICTL register. The source clock for the RTI is OSCCLK.
S12XECRG RTI Control Register (RTICTL)
0
7
A write to this register initializes the RTI counter.
and
Table
OFF
(OFF)
000
11-11.
RTR6
(1)
Figure 11-10. S12XECRG RTI Control Register (RTICTL)
Table 11-10. RTI Frequency Divide Rates for RTDEC = 0
0
6
granularity.Table 11-10
MC9S12XE-Family Reference Manual , Rev. 1.23
(2
001
2
Table 11-9. RTICTL Field Descriptions
10
10
Table 11-8. FM Amplitude selection
)
RTR5
FM1
5
0
0
0
1
1
Table 11-10
Table 11-11
(2
010
2
11
11
0
1
0
1
)
and
RTR4
NOTE
FM0
0
4
Table 11-11
Description
(2
011
2
12
12
RTR[6:4] =
)
FM Amplitude /
FM off
±1%
±2%
±4%
f
VCO
RTR3
show all possible divide values selectable by the
0
3
Variation
(2
100
2
13
13
)
RTR2
2
0
(2
101
2
14
14
)
Freescale Semiconductor
RTR1
0
1
(2
110
2
15
15
)
RTR0
Table 11-
(2
111
2
0
0
16
16
)