S912XEQ384J3CAL Freescale Semiconductor, S912XEQ384J3CAL Datasheet - Page 114

IC MCU 16BIT 384KB FLASH 112LQFP

S912XEQ384J3CAL

Manufacturer Part Number
S912XEQ384J3CAL
Description
IC MCU 16BIT 384KB FLASH 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S912XEQ384J3CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Core
HCS12X
Data Bus Width
16 bit
Data Ram Size
24 KB
Interface Type
SCI, SPI, I2C, CAN
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
1
Operating Supply Voltage
3.13 V to 5.5 V
Maximum Operating Temperature
+ 260 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEQ384J3CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1. Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other modes the data source
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.7
114
Function
Address 0x0004 (PRR)
is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
DDRB
Altern.
Field
Field
Reset
7-0
7-0
PC
W
R
Port B Data Direction—
This register controls the data direction of pins 7 through 0.
The external bus function forces the I/O state to be outputs for all associated pins. In this case the data direction bits
will not change.
When operating a pin as a general purpose I/O, the associated data direction bit determines whether it is an input
or output.
1 Associated pin is configured as output.
0 Associated pin is configured as high-impedance input.
Port C general purpose input/output data—Data Register
Port C pins 7 through 0 are associated with data I/O lines DATA[15:8] respectively in expanded modes.
When not used with the alternative function, these pins can be used as general purpose I/O.
If the associated data direction bits of these pins are set to 1, a read returns the value of the port register, otherwise
the buffered pin input state is read.
DATA15
Port C Data Register (PORTC)
PC7
0
7
DATA14
PC6
0
6
Table 2-8. PORTC Register Field Descriptions
Table 2-7. DDRB Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-5. Port C Data Register (PORTC)
DATA13
PC5
0
5
DATA12
PC4
0
4
Description
Description
DATA11
PC3
3
0
DATA10
PC2
0
2
Access: User read/write
Freescale Semiconductor
DATA9
PC1
0
1
DATA8
PC0
0
0
(1)

Related parts for S912XEQ384J3CAL