EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 127

System-on-Chip Processor

EP9312-CB

Manufacturer Part Number
EP9312-CB
Description
System-on-Chip Processor
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-CB

Peak Reflow Compatible (260 C)
No
A/d Converter
12 Bits
Leaded Process Compatible
No
No. Of I/o Pins
65
Package / Case
352-BGA
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1257

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Part Number
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Quantity
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EP9312-CB
Manufacturer:
Cirrus Logic Inc
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EP9312-CB
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CIRRUS
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DS785UM1
5.1.1 System Startup
5.1.2 System Reset
5.1 Introduction
The System Controller (Syscon) provides:
These central resources are controlled by a set of software-locked registers, which can be
used to prevent accidental accesses. Syscon generates the various bus and peripheral
clocks and controls the system startup configuration.
System startup begins with the assertion of a reset signal. There are five different categories
of reset events. In order of decreasing effect, the reset events are:
During the time that any reset is active, the system is halted until it exits the reset state.
When the device starts with an external PRSTn or RSTOn, certain hardware configurations
are determined, and some system configuration information will be recorded so that software
can access it. See the details in
Control” on page
The device system reset consists of several events and signals. It has four levels of reset
control:
• Clock control
• Power management
• System configuration management
• PRSTn (external pin for power-on reset)
• RSTOn (external pin for user reset)
• Three-key reset externally generated by a Keypad (behaves like user reset)
• Watchdog reset (internally generated)
• Software reset (internally generated)
• Power-on-reset, controlled by PRSTn pin. It resets the entire processor with no
• User reset, controlled by RSTOn pin. While active, it resets the entire processor, except
exceptions.
5-2.
Copyright 2007 Cirrus Logic
“System Reset” on page 5-1
5System Controller
and
“Hardware Configuration
Chapter 5
5-1
5

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