EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 567

• Manufacturer Part Number: EP9312-CB
• Description: System-on-Chip Processor
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CB

• Peak Reflow Compatible (260 C): No
• A/d Converter: 12 Bits
• Leaded Process Compatible: No
• No. Of I/o Pins: 65
• Package / Case: 352-BGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1257

UART2LinCtrlHigh
DS785UM1
31
15
Address:
Default:
Definition:
Bit Descriptions:
30
14
29
13
28
12
FE:
0x808D_0008 - Read/Write
0x0000_0000
UART - High. UART2LinCtrlHigh, UART2LinCtrlMid and UART2LinCtrlLow
form a single 23-bit wide register (UART2LinCtrl) which is updated on a single
write strobe generated by an UART2LinCtrlHigh write. So, in order to internally
update the contents of UART2LinCtrlMid or UART2LinCtrlLow, a
UART2LinCtrlHigh write must always be performed at the end.
To update the three registers there are two possible sequences:
• UART2LinCtrlLow write, UART2LinCtrlMid write and UART2LinCtrlHigh write
• UART2LinCtrlMid write, UART2LinCtrlLow write and UART2LinCtrlHigh
write.
To update UART2LinCtrlLow or UART2LinCtrlMid only:
•
write.
RSVD:
WLEN:
UART2LinCtrlLow write (or UART2LinCtrlMid write) and UART2LinCtrlHigh
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Framing Error. When this bit is set to “1”, it indicates that
the received character did not have a valid stop bit (a valid
stop bit is “1”). This bit is cleared to 0 by a write to
UART2RXSts. In FIFO mode, this error is associated with
the character at the top of the FIFO.
Reserved. Unknown During Read.
Number of bits per frame:
11 = 8 bits
10 = 7 bits
01 = 6 bits
00 = 5 bits
24
8
RSVD
23
7
22
6
WLEN
21
5
FEN
20
4
STP2
19
3
EP93xx User’s Guide
EPS
18
2
PEN
17
1
UART2
BRK
16
15-9
0
15