EP9312-CB Cirrus Logic Inc, EP9312-CB Datasheet - Page 58

• Manufacturer Part Number: EP9312-CB
• Description: System-on-Chip Processor
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CB

• Peak Reflow Compatible (260 C): No
• A/d Converter: 12 Bits
• Leaded Process Compatible: No
• No. Of I/o Pins: 65
• Package / Case: 352-BGA
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No
• Other names: 598-1257

2
2-20
0x8002_0030
0x8002_0034
0x8002_0038
0x8002_003C
0x8002_0040
0x8002_0044
0x8002_0048
0x8002_004C
0x8002_0050
0x8002_0054
0x8002_0058
0x8002_005C
0x8002_0080
0x8002_0084
0x8003_xxxx
0x8003_0000
0x8003_0004
0x8003_0008
0x8003_000C
0x8003_0010
0x8003_0014
0x8003_0018
0x8003_001C
0x8003_0020
0x8003_0024
0x8003_0028
0x8003_002C
0x8003_0030
0x8003_0034
0x8003_0038
0x8003_003C
0x8003_0040
0x8003_0044
0x8003_0048
0x8003_004C
0x8003_0050
0x8003_0054
0x8003_0058
0x8003_005C
0x8003_0060
0x8003_0064
0x8003_0068
ARM920T Core and Advanced High-Speed Bus (AHB)
EP93xx User’s Guide
Address
HcDoneHead
HcFmInterval
HcFmRemaining
HcFmNumber
HcPeriodicStart
HcLSThreshold
HcRhDescriptorA
HcRhDescriptorB
HcRhStatus
HcRhPortStatus[1]
HcRhPortStatus[2]
HcRhPortStatus[3]
USBCtrl
USBHCI
VLinesTotal
VSyncStrtStop
VActiveStrtStop
VClkStrtStop
HClkTotal
HSyncStrtStop
HActiveStrtStop
HClkStrtStop
Brightness
VideoAttribs
VidScrnPage
VidScrnHPage
ScrnLines
LineLength
VLineStep
LineCarry
BlinkRate
BlinkMask
BlinkPattrn
PattrnMask
BkgrndOffset
PixelMode
ParllIfOut
ParllIfIn
CursorAdrStart
CursorAdrReset
CursorSize
Register Name
Table 2-8. Internal Register Map (Continued)
RASTER
Copyright 2007 Cirrus Logic
USB Host Controller Done Head
USB Host Controller Fm Interval
USB Host Controller Fm Remaining
USB Host Controller Fm Number
USB Host Controller Periodic Start
USB Host Controller LS Threshold
USB Host Controller Root Hub Descriptor A
USB Host Controller Root Hub Descriptor B
USB Host Controller Root Hub Status
USB Host Controller Root Hub Port Status 1
USB Host Controller Root Hub Port Status 2
USB Host Controller Root Hub Port Status 3
USB Configuration Control
USB Host Controller Interface Status
Total Number of vertical frame lines
Vertical sync pulse setup
Vertical blanking setup
Vertical clock active frame
Total Number of horizontal line clocks
Horizontal sync pulse setup
Horizontal blanking setup
Horizontal clock active frame
PWM brightness control
Video state machine parameters
Starting address of video screen
Starting address of video screen half page
Number of active lines scanned to the screen
Length in words of data for lines
Memory step for each line
Horizontal/vertical offset parameter
Blink counter setup
Logic mask applied to pixel to perform blink operation
Compare value for determining blinking pixels
Mask to limit pattern
Background color or blink offset value
Pixel mode definition setup Register
Parallel interface write/control Register
Parallel interface read/setup Register
Word location of the top left corner of cursor to be displayed
Location of first word of cursor to be scanned after last line
Cursor height, width, and step size Register
Raster Control Registers
Register Description
DS785UM1
Lock
SW
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y