IP-CPRI Altera, IP-CPRI Datasheet - Page 110

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

6–8
Table 6–15. CPRI_CM_STATUS—CPRI Control and Management Status—Offset: 0x2C (Part 2 of 2)
Table 6–16. CPRI_RX_DELAY_CTRL—Receiver Delay Control—Offset: 0x30
CPRI MegaCore Function User Guide
rx_slow_cm_rate
RSRV
rx_fast_cm_ptr_valid
rx_fast_cm_ptr
RSRV
rx_buf_resync
RSRV
rx_buf_int_delay [(WIDTH_RX_BUF-1):0]
Note to
(1) WIDTH_RX_BUF is the value specified for the Receiver buffer depth parameter. This value is log
it is set to six, specifying a 64-entry buffer. Altera recommends that you set it to four, specifying a 16-entry buffer, in slave configurations.
Table
Field
6–16:
Field
[31:17]
[16]
[15:WIDTH_RX_BUF]
[10:8]
[7]
[6]
[5:0]
Bits
Bits
RO
UR0
RO
RO
Access
(1)
(1)
Access
UR0
RW
UR0
RW
Accepted receive slow C&M rate, as determined during
the software set-up sequence, or by dynamic
modification, in which the same new pointer value is
received in incoming CPRI control byte Z.66.0 four
hyperframes in a row.
The following values are defined:
For information about compatible slow C&M rates and
CPRI line rates, refer to
Reserved.
Indicates that a valid fast C&M pointer has been accepted.
Accepted receive fast C&M pointer, as determined during
the software set-up sequence or by dynamic
modification, in which the same new pointer value is
received in incoming CPRI control byte Z.194.0 four
hyperframes in a row. The value is between 0x24 and
0x3F, inclusive.
000: No HDLC channel.
001: 240 Kbps
010: 480 Kbps
011: 960 Kbps
100: 1920 Kbps
101: 2400 Kbps
Reserved.
Force CPRI receiver buffer (Rx elastic
buffer) realignment. Altera recommends
that you resynchronize the Rx elastic
buffer after a dynamic CPRI line rate
change. Resynchronizing might lead to
data loss or corruption.
Reserved.
Initial buffer delay with which to align the
Rx elastic buffer. After you modify the
value of this field, you must set the
rx_buf_resync bit to resynchronize the
buffer.
Table 4–11 on page
Function
Function
2
of the depth of the Rx elastic buffer. By default,
Chapter 6: Software Interface
4–57.
May 2011 Altera Corporation
CPRI Interface Registers
15'h0
1’h0
0
2
WIDTH_RX_BUF-1
Default
3’h0
1'h0
1'h0
6’h0
Default