IP-CPRI Altera, IP-CPRI Datasheet - Page 32
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IP-CPRI
Manufacturer Part Number
IP-CPRI
Description
IP CORE - Common Public Radio Interface (CPRI)
Manufacturer
Altera
Specifications of IP-CPRI
Software Application
IP CORE, Interface And Protocols, HIGH SPEED
Supported Families
Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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4–8
Figure 4–3. CPRI IP Core Master Clocking in Arria II GX and Cyclone IV GX Devices
CPRI MegaCore Function User Guide
gxb_txdataout
gxb_rxdatain
gxb_refclk
pll_inclk
ALTGX
Figure 4–3
or as an RE master with CPRI line rate greater than 0.6144 Gbps in an Arria II GX or
Cyclone IV GX device.
CDR
rx_clkout
tx_clkout
shows the clock diagram for a CPRI IP core configured as an REC master
data
gxb_pll_inclk
16
16
data
Divide
Divide
by 2
by 2
Buffer
Buffer
FIFO
FIFO
32
cpri_clkout
data
32
clk_ex_delay
Sync Buffer
CPRI RX
Rx Elastic
CPRI TX
clk
clk
cpri_tx_aux_data
32
32
cpri_rx_aux_data
32
32
Ethernet MAC
data
HDLC
CPRI MegaCore Function
clk
clk
data
Chapter 4: Functional Description
CPRI Tx
Interface
CPRI Rx
Interface
Buffer
Buffer
FIFO
FIFO
MAP
MAP
May 2011 Altera Corporation
Clocking and Reset Structure
clk
MII Interface
Interface
CPU
mapXX_tx_data
mapXX_tx_clk
mapXX_rx_clk
mapXX_rx_data
cpri_mii_txclk
cpri_mii_rxclk
cpu_clk
cpu_writedata
cpu_readdata
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