NQ80331M667 S L824 Intel, NQ80331M667 S L824 Datasheet - Page 65

• Manufacturer Part Number: NQ80331M667 S L824
• Manufacturer: Intel

Specifications of NQ80331M667 S L824

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Table 237.
Affected Docs: Intel
Specification Update
30:28
27:24
22:20
19:17
16:12
11:09
08:04
03:00
Bit
31
23
Attributes
Attributes
IOP
0 0000 2
0 0000 2
PCI
Default
000 2
000 2
000 2
000 2
0H
0H
0
0
Intel XScale
FFFF E508H
2
2
DDR SDRAM Control Register 1 - SDCR1
rw
na
31
®
na
rw
80331 I/O Processor Developer’s Manual
DQS# Disable: Controls the behavior of the strobes as well as the configuration of the DIMM.
0 = DQS# Enabled for Differential operation, EMRS bit 10 will be programmed as zero.
1 = DQS# Disabled for Singled-ended operation, EMRS bit 10 will be programmed as one.
RTCMD: Read-to-Command (non-Read) turnaround period in MCLK periods.
all other values reserved
WTCMD: Write-to-Command (non-Read) turnaround period in MCLK periods.
Equation 10: WTCMD = tCAS + tWR + tREG
where tREG = 1 for registered DIMM and 0 for unbuffered DIMM, tCAS and tWR are from SPD.
Reserved
RTW: Read-to-Write turnaround period in MCLK periods.
Equation 11: RTW = tCAS + (BL/2) + tREG + (tEDP-1) = tCAS + tREG + 3
where tREG = 1 for registered DIMM and 0 for unbuffered DIMM, BL=4, tCAS is from SPD, and EDP=2.
NOTE: a programmed value of 000
Reserved
RFC: Refresh-to-Active and Refresh-to-Refresh period in MCLK periods
Equation 12: RFC = tRFC - 1
where tRFC is from SPD
WR: Write Recovery time in MCLK periods.
all other values reserved
RC: Active-to-Active and Active-to-Refresh period in MCLK periods.
Equation 13: RC = tRC - 1
where tRC is from SPD
WTRD: Write-to-Read turnaround period in MCLK periods.
Equation 14: WTRD = tCAS + tWTR + tREG
where tREG = 1 for registered DIMM and 0 for unbuffered DIMM, tCAS and tWTR are from SPD.
• 010 = 2 MCLK periods (DDR-I Type only)
• 011 = 3 MCLK periods (DDR-II Type only)
• 000 = 0 - for DDR333
• 010 = 3 - for DDR-II 400 (encoding per JEDEC spec)
rw
na
®
core Local Bus Address
na
rw
28
na
rw
rw
na
na
rw
rw
na
24
na
rv
na
rw
rw
na
na
rw
20
na
rv
2
na
rv
represents a decimal value of eight (8).
na
rv
rw
na
16
Description
rw
na
na
rw
rw
na
rw
na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
12
na
rw
rw
na
na
rw
rw
na
Intel
Documentation Changes
8
rw
na
®
na
rw
80331 I/O Processor
rw
na
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
rw
na
4
na
rw
rw
na
na
rw
rw
na
0
65