DSPB56362AG120 Freescale Semiconductor, DSPB56362AG120 Datasheet - Page 5

• Manufacturer Part Number: DSPB56362AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56362AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (126 kB)
• On-chip Ram: 42kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Architecture: Modified Harvard
• Format: Fixed Point
• Clock Freq (max): 120MHz
• Mips: 120
• Device Input Clock Speed: 120MHz
• Ram Size: 42KB
• Program Memory Size: 90KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Instruction Set Architecture: Modified Harvard
• Device Million Instructions Per Second: 120 MIPS
• Maximum Clock Frequency: 120 MHz
• Program Memory Type: Flash
• Data Ram Size: 42 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SPI, I2C, ESAI, SHI
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.2
1.3
Table 1-1
design properly with the part. Documentation is available from a local Freescale distributor, a Freescale
semiconductor sales office, a Freescale Literature Distribution Center, or through the Freescale DSP home
page on the Internet (the source for the latest information).
Freescale Semiconductor
DSP56300 Family Manual
DSP56362 User’s Manual
DSP56362 Product Brief
DSP56362 Data Sheet
(this document)
•
•
— Triple timer module with single external interface or GPIO line
— On-chip peripheral registers are memory mapped in data memory space
Reduced Power Dissipation
— Very low-power (3.3 V) CMOS design
— Wait and stop low-power standby modes
— Fully-static logic, operation frequency down to 0 Hz (dc)
— Optimized power management circuitry (instruction-dependent, peripheral-dependent, and
144-pin plastic thin quad flat pack (LQFP) surface-mount package
Package
Documentation
lists the documents that provide a complete description of the DSP56362 and are required to
mode-dependent)
Document Name
Table 1-1 DSP56362 Documentation
Detailed description of the 56000-family architecture
and the 24-bit core processor and instruction set
Detailed description of memory, peripherals, and
interfaces
Brief description of the chip
Electrical and timing specifications; pin and package
descriptions
DSP56362 Technical Data, Rev. 4
Description
Order Number
DSP56362UM
DSP56300FM
DSP56362P
DSP56362
Overview
1-5