DSPB56362AG120 Freescale Semiconductor, DSPB56362AG120 Datasheet - Page 89

• Manufacturer Part Number: DSPB56362AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56362AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (126 kB)
• On-chip Ram: 42kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Architecture: Modified Harvard
• Format: Fixed Point
• Clock Freq (max): 120MHz
• Mips: 120
• Device Input Clock Speed: 120MHz
• Ram Size: 42KB
• Program Memory Size: 90KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Instruction Set Architecture: Modified Harvard
• Device Million Instructions Per Second: 120 MIPS
• Maximum Clock Frequency: 120 MHz
• Program Memory Type: Flash
• Data Ram Size: 42 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SPI, I2C, ESAI, SHI
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
443 FSR input hold time after RXC falling edge
444 Flags input setup before RXC falling edge
445 Flags input hold time after RXC falling edge
446 TXC rising edge to FST out (bl) high
447 TXC rising edge to FST out (bl) low
448 TXC rising edge to FST out (wr) high
449 TXC rising edge to FST out (wr) low
450 TXC rising edge to FST out (wl) high
451 TXC rising edge to FST out (wl) low
452 TXC rising edge to data out enable from high
453 TXC rising edge to transmitter drive enable
454 TXC rising edge to data out valid
455 TXC rising edge to data out high impedance
456 TXC rising edge to transmitter drive enable
457 FST input (bl, wr) setup time before TXC falling
No.
impedance
assertion
deassertion
edge
6
7
Characteristics
Table 3-24 Enhanced Serial Audio Interface Timing (continued)
1
,
2, 3
6
6
DSP56362 Technical Data, Rev. 4
7
Symbol
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
23 + 0.5 × T C 21.0
Expression
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Enhanced Serial Audio Interface Timing
19.0
21.0
Min
3.0
0.0
0.0
6.0
0.0
2.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
100 MHz
Max
29.0
15.0
31.0
17.0
31.0
17.0
33.0
19.0
30.0
16.0
31.0
17.0
31.0
17.0
34.0
20.0
28.0
21.0
31.0
16.0
34.0
20.0
—
—
—
—
—
—
—
—
Condition
i ck a
i ck s
i ck s
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
i ck
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3-63