DSPB56362AG120 Freescale Semiconductor, DSPB56362AG120 Datasheet - Page 54

• Manufacturer Part Number: DSPB56362AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56362AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (126 kB)
• On-chip Ram: 42kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Architecture: Modified Harvard
• Format: Fixed Point
• Clock Freq (max): 120MHz
• Mips: 120
• Device Input Clock Speed: 120MHz
• Ram Size: 42KB
• Program Memory Size: 90KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Instruction Set Architecture: Modified Harvard
• Device Million Instructions Per Second: 120 MIPS
• Maximum Clock Frequency: 120 MHz
• Program Memory Type: Flash
• Data Ram Size: 42 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SPI, I2C, ESAI, SHI
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

External Memory Expansion Port (Port A)
3-28
No.
157
158
159
160
161
162
163
164
Random read or write cycle time
RAS assertion to data valid (read)
CAS assertion to data valid (read)
Column address valid to data valid (read)
CAS deassertion to data not valid (read hold
time)
RAS deassertion to RAS assertion
RAS assertion pulse width
CAS assertion to RAS deassertion
DRAM Type
(tRAC ns)
100
80
70
50
Table 3-13 DRAM Out-of-Page and Refresh Timings, Four Wait States
60
Characteristics
Figure 3-16 DRAM Out-of-Page Wait States Selection Guide
4 Wait States
8 Wait States
Note: This figure should be use for primary selection. For exact
40
3
66
and detailed timings see the following tables.
80
DSP56362 Technical Data, Rev. 4
100
Symbol
t
t
t
t
t
t
RAC
CAC
t
RSH
t
OFF
RAS
RC
AA
RP
11 Wait States
15 Wait States
120
2.75 × T
1.25 × T
1.75 × T
3.25 × T
1.75 × T
1.5 × T
Expression
5 × T
C
C
C
C
C
C
C
− 7.5
− 7.5
− 7.5
− 4.0
− 4.0
− 4.0
Chip Frequency
(MHz)
250.0
158.5
83.5
83.5
Min
0.0
—
—
—
20 MHz
130.0
Max
55.0
67.5
4
—
—
—
—
—
Freescale Semiconductor
166.7
104.3
54.3
54.3
1, 2
Min
0.0
AA0475
—
—
—
30 MHz
Max
84.2
34.2
42.5
4
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns