EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 90
EP3SL150F1152C2N
Manufacturer Part Number
EP3SL150F1152C2N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C2N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2409
EP3SL150F1152C2NES
EP3SL150F1152C2NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3SL150F1152C2N
Manufacturer:
ALTERA
Quantity:
20 000
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4–10
Figure 4–8. ECC Block Diagram of the M144K
Memory Modes
Single Port RAM
Stratix III Device Handbook, Volume 1
Data Input
64
1
Figure 4–8
Stratix III TriMatrix memory blocks allow you to implement fully synchronous SRAM
memory in multiple modes of operation. M9K and M144K blocks do not support
asynchronous memory (unregistered inputs). MLABs support asynchronous
(flow-through) read operations.
Depending on which TriMatrix memory block you target, the following modes may
be used:
■
■
■
■
■
■
When using the memory blocks in ROM, single-port, simple dual-port, or true
dual-port mode, you can corrupt the memory contents if you violate the setup or
hold-time on any of the memory block input registers. This applies to both read and
write operations.
All TriMatrix memory blocks support single-port mode. Single-port mode allows you
to do either one read or one write operation at a time. Simultaneous reads and writes
are not supported in single-port mode.
configuration.
64
Single-port
Simple dual-port
True dual-port
Shift-register
ROM
FIFO
SECDED
Encoder
64
shows a block diagram of the ECC block of the M144K.
8
72
RAM
Array
Chapter 4: TriMatrix Embedded Memory Blocks in Stratix III Devices
72
Figure 4–9
64
64
Data Output
Correction
shows the single-port RAM
Error
Block
SECDED
Encoder
8
64
Locator
Error
64
8
© May 2009 Altera Corporation
8
Comparator
8
Status Flags
Generator
Flag
3
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