Z85C3008VSG Zilog, Z85C3008VSG Datasheet - Page 187

• Manufacturer Part Number: Z85C3008VSG
• Description: IC 8MHZ Z8500 CMOS SCC 44-PLCC
• Manufacturer: Zilog
• Series: SCCr

Specifications of Z85C3008VSG

• Processor Type: Z80
• Features: Error Detection and Multiprotocol Support
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Cpu Speed: 8MHz
• Digital Ic Case Style: LCC
• No. Of Pins: 44
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 85
• Rohs Compliant: Yes
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3932; Z85C3008VSG

Application Note
The Z180™ Interfaced with the SCC at MHZ
Table 14 lists a program example for the Z180/SCC DMA transfer test.
;
;*
;*
;*
;*
;*
;*
;*
;*
;*
;*
;*
;*
;*
;*
;*
;*
.z800
;
*include 180macro.lib
;SCC Registers
scc_ad:
scc_ac:
scc_bd:
scc_bc:
scc_a:
scc_cont:
scc_data:
scc_cont:
scc_data:
length:
sccdma:
6-52
(Continued)
Test program for 180 DMA/SCC
Test 180’s DMA function with SCC
180 dma - dma0 for scc rx data
async, X1 mode, 1 stop, speed = pclk/4
Connect W/REQ to DREQ0 of 180
B register returns status info:
Bit D0 set : Tx DMA end
dma1 for scc tx data
self loop-back
DTR/REQ to DREQ1 of 180
D1 set : Rx DMA end
D2 set : Data doesn’t match
if
else
endif
Table 14. Test Program – Z180/SCC DMA Transfer
equ
equ
equ
equ
equ
scc_a
equ
equ
equ
equ
equ
org
ld
ld
ld
ld
out0
im
call
call
0C3h
0C2h
0C1h
0C0h
00h
scc_ac
scc_ad
scc_bc
scc_bd
1000h
09000h
sp,tx_buff
a,(high z180vect) and 0ffh
i,a
a,00h
(il),a
2
fill_mem
initscc
Read in Z180 register names and
;macro for Z180 new instructions
;addr of scc ch a - data
;addr of scc ch a - control
;addr of scc ch b - data
;addr of scc ch b - control
;if test ch. a, set this to 0ffh
;for ch.b, set this to 00h
;transfer length
;top of user ram area
;init sp
;init i reg
;init il
;Set interrupt mode 2
;initialize tx/rx buffer area
;initialize scc
UM010901-0601