Z85C3008VSG Zilog, Z85C3008VSG Datasheet - Page 206

• Manufacturer Part Number: Z85C3008VSG
• Description: IC 8MHZ Z8500 CMOS SCC 44-PLCC
• Manufacturer: Zilog
• Series: SCCr

Specifications of Z85C3008VSG

• Processor Type: Z80
• Features: Error Detection and Multiprotocol Support
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Cpu Speed: 8MHz
• Digital Ic Case Style: LCC
• No. Of Pins: 44
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 85
• Rohs Compliant: Yes
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3932; Z85C3008VSG

UM010901-0601
Sensing which Serial Controller Channel is
connected to the Console
In order to use the software provided with this evaluation
board, one of the serial controller channels must be
connected to a Personal Computer (or a dumb terminal)
via the J1 and J13 connectors. Some versions of this
software may restrict the choice to (E)SCC Channel A or
the (M)USC, depending on the user’s applications needs,
but there is nothing in the hardware that limits the choice
of which serial channel is used for the Console. However,
on the J1-J4 (J13-J15) side there are two things that are
special about the J1/J13 section as compared to the
others. One is the provision for a Non-Maskable Interrupt
in response to a received Start bit, as described earlier in
the section on (E)SCC addressing.
Software can use the other special feature of the J1/J13
section, after a Reset, to sense which serial channel is
connected to the Console port. A Reset signal (from
power-on or the Reset button, but not from the Reset-the-
ISCC, etc., address decode as described earlier) puts the
“NMI” EPLD in a special mode wherein the first Start bit on
the Console’s Transmit Data lead causes an NMI. This
feature can be used in a start-up procedure like the
following, to tell which serial controller channel is used for
the Console:
For each serial controller channel that the software can
use for the Console:
1. Initialize the channel.
2. Send a NUL character to the channel.
3. Wait a short time to see if an NMI occurs. If so, the
If none of the allowed serial channels produces an NMI,
the user has not properly jumpered any J5-J10 connector
block to the J13 block.
Basic software should use the serial controller channel for
the Console in a very basic, polled way. Because of this
and because of similarities between the (E)SCC and the
ISCC, and between the (M)USC and the IUSC, note that
software allows the Console to be connected to either the
(E)SCC channel A or to the (M)USC; in fact, it includes
most of the code necessary to use any of the six serial
controller channels for the Console.
current channel is the Console. If not, go on to the next
serial channel and try again.
Notes on J4/Macintosh/AppleTalk/LocalTalk
The J4 connector is similar to that offered on various
Macintosh systems. The ESCC and ISCC are particularly
well adapted for use with this port, and development of
USC family capability for AppleTalk/LocalTalk is of
interest.
The J3 and J4 connectors cannot be used simultaneously.
The J16 jumper block controls whether the RS-422 driver
for Transmit Data is turned “on” and “off” under control of
the associated Request to Send signal, as on the Mac, or
is “on” full time, which is more suitable for the use of J3. To
put the TxD driver under control of RTS, jumper J16-1 to
J16-J2 and leave J16-J3 open. For full-time drive on TxD
(and also the J3 RTS pins), jumper J16-J2 to J16-J3 and
leave J16-J1 open.
The J17 jumper block controls whether the reception of
Data Carrier Detect and Clear to Send is differential (on
J3) or unbalanced, as on J4. To use differential signalling
from J3, remove all jumpers from J17.
On the initial Macintosh and subsequent ones as well,
Apple did the unbalanced signalling backward from
standard RS-423 and RS-232 polarity for the CTS lead
(also called HSK and HSKI). If you are developing code for
Macintosh hardware, you can preserve Mac compatibility
by jumpering J17-J3 to J17-J5 and J17-J4 to J17-J6. This
grounds the CTS- lead and connects the CTS+ lead to J4-
J2. It also (assuming a standard source at the other end)
inverts CTS to the opposite sense from that expected by
the serial controller for functions such as auto-enabling. To
make the CTS input of the serial controller have its normal
(low-true) sense, jumper J17-J3 to J17-J4, and J17-J5 to
J17-J6– this grounds the CTS+ lead and connects the
CTS- lead to J4-J2.
The DTR (HSKO) output is provided in Apple systems from
Mac Plus onward and has standard RS-423 (and RS-232)
polarity.
The DCD input on J4-J7 is provided in Apple systems from
the Mac II and SE onward, and also has standard polarity
on Apple hardware. Jumper J17-J1 to J17-J2 to ground the
“+” input of the receiver; the “–” lead is connected to J4-J7.
The Zilog Datacom Family with the 80186 CPU
Application Note
6-71
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