MPC8533EVTANG Freescale Semiconductor, MPC8533EVTANG Datasheet - Page 1275
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MPC8533EVTANG
Manufacturer Part Number
MPC8533EVTANG
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTANG
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
800MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8533EVTANG
Manufacturer:
FREESCAL
Quantity:
513
Company:
Part Number:
MPC8533EVTANG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8533EVTANGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- MPC8533VTALF PDF datasheet
- MPC8533VTALF PDF datasheet #2
- MPC8533VTALF PDF datasheet #3
- MPC8533VTALF PDF datasheet #4
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Freescale Semiconductor
0x2_4240–
0x2_4308–
0x2_4318–
0x2_4344–
0x2_420C
0x2_421C
0x2_422C
0x2_423C
0x2_42FC
0x2_430C
0x2_432C
0x2_433C
0x2_437C
0x2_438C
0x2_4210
0x2_4214
0x2_4218
0x2_4220
0x2_4224
0x2_4228
0x2_4230
0x2_4234
0x2_4238
0x2_4300
0x2_4304
0x2_4310
0x2_4314
0x2_4330
0x2_4334
0x2_4338
0x2_4340
0x2_4380
0x2_4384
0x2_4388
0x2_4390
0x2_4394
Offset
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
TBASE1*—TxBD base address of ring 1
Reserved
TBASE2*—TxBD base address of ring 2
Reserved
TBASE3*—TxBD base address of ring 3
Reserved
TBASE4*—TxBD base address of ring 4
Reserved
TBASE5*—TxBD base address of ring 5
Reserved
TBASE6*—TxBD base address of ring 6
Reserved
TBASE7*—TxBD base address of ring 7
Reserved
RCTRL—Receive control register
RSTAT—Receive status register
Reserved
RXIC—Receive interrupt coalescing register
RQUEUE*—Receive queue control register.
Reserved
RBIFX*—Receive bit field extract control register
RQFAR*—Receive queue filing table address register
RQFCR*—Receive queue filing table control register
RQFPR*—Receive queue filing table property register
MRBLR—Maximum receive buffer length register
Reserved
RBDBPH*—Rx data buffer pointer high bits
RBPTR0—RxBD pointer for ring 0
Reserved
RBPTR1*—RxBD pointer for ring 1
Reserved
RBPTR2*—RxBD pointer for ring 2
eTSEC Receive Control and Status Registers
Table B-1. Memory Map (continued)
Register
Complete List of Configuration, Control, and Status Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0080_0080
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
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