MPC8533EVTANG Freescale Semiconductor, MPC8533EVTANG Datasheet - Page 271

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MPC8533EVTANG

Manufacturer Part Number
MPC8533EVTANG
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTANG

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
800MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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SRAM features include the following:
Table 1
Freescale Semiconductor
Error injection modes supported for testing error handling
SRAM regions are created by configuring 1, 2, 4 or 8 ways of each set to be reserved for
memory-mapped SRAM.
Regions can reside at any location in the memory map aligned to the SRAM size.
SRAM memory is byte addressable; for accesses of less than a cache line, ECC is updated using
read-modify-write transactions.
I/O devices access SRAM regions by marking transactions as snoopable (global).
lists the possible L2 cache/SRAM configurations.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
256 Kbytes
224 Kbytes
192 Kbytes
160 Kbytes
128 Kbytes
96 Kbytes
64 Kbytes
Cache
Table 1. Available L2 Cache/SRAM Configurations
Stash-only Region
128 Kbytes
128 Kbytes
128 Kbytes
128 Kbytes
32 Kbytes
32 Kbytes
64 Kbytes
32 Kbytes
64 Kbytes
64 Kbytes
32 Kbytes
64 Kbytes
SRAM Region 1
128 Kbytes
128 Kbytes
128 Kbytes
256 Kbytes
128 Kbytes
128 Kbytes
32 Kbytes
64 Kbytes
32 Kbytes
32 Kbytes
64 Kbytes
32 Kbytes
32 Kbytes
64 Kbytes
64 Kbytes
32 Kbytes
64 Kbytes
32 Kbytes
64 Kbytes
64 Kbytes
32 Kbytes
64 Kbytes
SRAM Region 2
128 Kbytes
32 Kbytes
32 Kbytes
64 Kbytes
32 Kbytes
64 Kbytes
64 Kbytes
32 Kbytes
64 Kbytes
L2 Look-Aside Cache/SRAM
7-3

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