MPC8533EVTANG Freescale Semiconductor, MPC8533EVTANG Datasheet - Page 810

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MPC8533EVTANG

Manufacturer Part Number
MPC8533EVTANG
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTANG

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
800MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Enhanced Three-Speed Ethernet Controllers
Table 15-55
15.5.3.6.2
Figure 15-53
Table 15-56
15.5.3.6.3
Figure 15-54
Table 15-57
15-80
10–31 TR255 Transmit and receive 128- to 255-byte frame counter—Increments for each good or bad frame transmitted and
10–31 TR127 Transmit and receive 65- to 127-byte frame counter—Increments for each good or bad frame transmitted and
10–31
Bits
Bits
0–9
0–9
Bits
0–9
Offset eTSEC1:0x2_4684; eTSEC3:0x2_6684
Reset
Offset eTSEC1:0x2_4688; eTSEC3:0x2_6688
Reset
W
W
R
R
Name
Name
Name
TR64 Transmit and receive 64-byte frame counter—Increment for each good or bad frame transmitted and received
0
0
describes the fields of the TR64 register.
describes the fields of the TR127 register.
describes the fields of the TR255 register.
Figure 15-54. Transmit and Received 128- to 255-Byte Frame Register Definition
describes the definition for the TR127 register.
describes the definition for the TR255 register.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Figure 15-53. Transmit and Receive 65- to 127-Byte Frame Register Definition
Reserved
received which is 128–255 bytes in length, inclusive (excluding preamble and SFD but including FCS bytes).
Reserved
which is 64 bytes in length, inclusive (excluding preamble and SFD but including FCS bytes).
Transmit and Receive 65- to 127-Byte Frame Counter (TR127)
Transmit and Receive 128- to 255-Byte Frame Counter (TR255)
Reserved
received which is 65–127 bytes in length, inclusive (excluding preamble and SFD but including FCS bytes).
Table 15-56. TR127 Field Descriptions
Table 15-57. TR255 Field Descriptions
Table 15-55. TR64 Field Descriptions
9
9
10
10
All zeros
All zeros
Description
Description
Description
TR127
TR255
Freescale Semiconductor
Access: Read/Write
Access: Read/Write
31
31

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