MPC8533EVTANG Freescale Semiconductor, MPC8533EVTANG Datasheet - Page 357

• Manufacturer Part Number: MPC8533EVTANG
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTANG

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 800MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

9.4.1.23
The memory data path read capture low register, shown in
data path during error capture.
Table 9-29
9.4.1.24
The memory data path read capture ECC register, shown in
were on the data bus when an error was detected.
Table 9-30
9.4.1.25
The memory error detect register stores the detection bits for multiple memory errors, single- and
multiple-bit ECC errors, and memory select errors. It is a read/write register. A bit can be cleared by
writing a one to the bit. System software can determine the type of memory error by examining the
contents of this register. If an error is disabled with ERR_DISABLE, the corresponding error is never
detected or captured in ERR_DETECT.
Freescale Semiconductor
0–31
Bits
24–31
0–23
Bits
Offset 0xE24
Offset 0xE28
Reset
Reset
W
W
R
R
Name
ECLD Error capture low data path. Captures the low word of the data path when errors are detected.
Name
0
0
ECE
describes the CAPTURE_DATA_LO fields.
describes the CAPTURE_ECC fields.
—
Figure 9-24. Memory Data Path Read Capture Low Register (CAPTURE_DATA_LO)
Memory Data Path Read Capture Low (CAPTURE_DATA_LO)
Memory Data Path Read Capture ECC (CAPTURE_ECC)
Memory Error Detect (ERR_DETECT)
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Figure 9-25. Memory Data Path Read Capture ECC Register (CAPTURE_ECC)
Reserved
Error capture ECC. Captures the ECC bits on the data path whenever errors are detected.
Table 9-29. CAPTURE_DATA_LO Field Descriptions
Table 9-30. CAPTURE_ECC Field Descriptions
—
All zeros
All zeros
ECLD
Description
Description
Figure
Figure
9-25, stores the ECC syndrome bits that
9-24, stores the low word of the read
23 24
Access: Read/Write
Access: Read/Write
DDR Memory Controller
ECE
31
31
9-35