MPC8533EVTANG Freescale Semiconductor, MPC8533EVTANG Datasheet - Page 806

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MPC8533EVTANG

Manufacturer Part Number
MPC8533EVTANG
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTANG

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
800MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Enhanced Three-Speed Ethernet Controllers
15.5.3.5.12 Interface Status Register (IFSTAT)
Figure 15-47
Table 15-50
15.5.3.5.13 MAC Station Address Part 1 Register (MACSTNADDR1)
The MACSTNADDR1 register is written by the user. The value of the station address written into
MACSTNADDR1 and MACSTNADDR2 is byte reversed from how it would appear in the DA field of a
frame in memory. For example, for a station address of 0x12345678ABCD, MACSTNADDR1 is set to
0xCDAB7856 and MACSTNADDR2 is set to 0x34120000.
15-76
Offset eTSEC1:0x2_453C; eTSEC3:0x2_653C
Reset
23–31
0–21
Bits
22
W
R
0
0–28
Bits
29
30
31
Excess Defer Excessive transmission defer. This bit latches high and is cleared when read. This bit is cleared by
Name
describes the fields of the FSTAT register.
shows the IFSTAT register.
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Not Valid Not valid.
Name
Scan
Busy
Reserved
default.
0 Normal operation.
1 The MAC excessively defers a transmission.
Reserved
Reserved
0 MII Mgmt read cycle has completed and the read data is valid.
1 MII Mgmt read cycle has not completed and the read data is not yet valid.
Scan in progress.
0 A scan operation (continuous MII Mgmt read cycles) is not in progress.
1 A scan operation (continuous MII Mgmt read cycles) is in progress.
Busy.
0 MII Mgmt block is not currently performing an MII Mgmt read or write cycle.
1 MII Mgmt block is currently performing an MII Mgmt read or write cycle.
Figure 15-47. Interface Status Register Definition
Table 15-49. MIIMIND Field Descriptions
Table 15-50. IFSTAT Field Descriptions
All zeros
Description
Description
21
Excess Defer
22
23
Freescale Semiconductor
Access: Read only
31

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