MPC8533EVTANG Freescale Semiconductor, MPC8533EVTANG Datasheet - Page 18
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MPC8533EVTANG
Manufacturer Part Number
MPC8533EVTANG
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8533VTALF.pdf
(112 pages)
2.MPC8533VTALF.pdf
(2 pages)
3.MPC8533VTALF.pdf
(16 pages)
4.MPC8533VTALF.pdf
(1332 pages)
Specifications of MPC8533EVTANG
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
800MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8533EVTANG
Manufacturer:
FREESCAL
Quantity:
513
Company:
Part Number:
MPC8533EVTANG
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8533EVTANGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
- MPC8533VTALF PDF datasheet
- MPC8533VTALF PDF datasheet #2
- MPC8533VTALF PDF datasheet #3
- MPC8533VTALF PDF datasheet #4
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Paragraph
Number
11.4.3
11.4.4
11.4.4.1
11.4.4.2
11.4.4.2.1
11.4.4.2.2
11.4.4.3
11.4.5
11.4.5.1
11.4.5.2
11.5
11.5.1
11.5.2
11.5.3
11.5.4
11.5.5
11.5.6
11.5.7
11.5.7.1
11.5.7.2
11.5.8
12.1
12.1.1
12.1.2
12.1.2.1
12.1.2.1.1
12.1.2.1.2
12.1.2.2
12.1.2.3
12.1.2.4
12.1.2.5
12.1.2.6
12.1.2.7
12.1.3
12.1.4
12.1.4.1
12.1.4.2
xviii
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Initialization/Application Information ......................................................................... 11-21
SEC 2.1 Architecture Overview .................................................................................... 12-2
Handshaking ............................................................................................................ 11-16
Clock Control........................................................................................................... 11-16
Boot Sequencer Mode.............................................................................................. 11-17
Initialization Sequence............................................................................................. 11-21
Generation of START .............................................................................................. 11-22
Post-Transfer Software Response ............................................................................ 11-22
Generation of STOP................................................................................................. 11-23
Generation of Repeated START .............................................................................. 11-23
Generation of SCL When SDA Low ....................................................................... 11-23
Slave Mode Interrupt Service Routine..................................................................... 11-23
Interrupt Service Routine Flowchart........................................................................ 11-24
Descriptors ................................................................................................................. 12-4
Execution Units (EUs) ............................................................................................... 12-5
Crypto-Channels ........................................................................................................ 12-8
Controller ................................................................................................................... 12-9
Clock Synchronization......................................................................................... 11-16
Input Synchronization and Digital Filter ............................................................. 11-16
Clock Stretching .................................................................................................. 11-17
EEPROM Calling Address .................................................................................. 11-19
EEPROM Data Format ........................................................................................ 11-19
Slave Transmitter and Received Acknowledge ................................................... 11-24
Loss of Arbitration and Forcing of Slave Mode.................................................. 11-24
Public Key Execution Unit (PKEU) ...................................................................... 12-5
Data Encryption Standard Execution Unit (DEU)................................................. 12-6
ARC Four Execution Unit (AFEU) ....................................................................... 12-6
Message Digest Execution Unit (MDEU) ............................................................. 12-7
Random Number Generator (RNG)....................................................................... 12-7
Advanced Encryption Standard Execution Unit (AESU)...................................... 12-7
Kasumi Execution Unit (KEU).............................................................................. 12-8
Channel-Controlled Access ................................................................................. 12-10
Host-Controlled Access ....................................................................................... 12-10
Input Signal Synchronization .......................................................................... 11-17
Filtering of SCL and SDA Lines ..................................................................... 11-17
Elliptic Curve Operations .................................................................................. 12-5
Modular Exponentiation Operations ................................................................. 12-6
Security Engine (SEC) 2.1
Contents
Chapter 12
Title
Freescale Semiconductor
Number
Page
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