IDT82P2282PF IDT, Integrated Device Technology Inc, IDT82P2282PF Datasheet - Page 118

• Manufacturer Part Number: IDT82P2282PF
• Description: TXRX T1/J1/E1 2CHAN 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Transceiverr

Specifications of IDT82P2282PF

• Number Of Drivers/receivers: 2/2
• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Screening Level: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82P2282PF

5.1.2
5.1.2.1
Programming Information
IDT82P2282
E1 Reg
00C ~
X2D ~
001 ~
(Hex)
011 ~
X2C
00A
00B
00D
00E
X20
X21
X22
X23
X24
X25
X26
X27
X28
X29
X2A
X2B
X30
X31
X32
X33
X34
X35
X36
X37
000
003
004
005
006
007
008
009
00F
010
01F
E1 MODE
DONE
DAT7
Bit 7
ID7
Direct Register
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
BPV_INS
DAC_IE
WDAT6
EQ_ON
DLLP
DAT6
Bit 6
ID6
RW
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
RJITT_TES
TJITT_TES
LINKSEL0
T_TERM2
DFM_ON
WDAT5
SLICE1
TJA_IE
SCAL5
DAT5
SLLP
Bit 5
ID5
UI1
T
T
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
RJA_LIMT
TJA_LIMT
T_TERM1
EXZ_DEF EXZ_ERR1 EXZ_ERR0
RSLVCK
WDAT4
SLICE0
R_OFF
RJA_IE
T_OFF
SCAL4
LATT4
T_HZ
LOS4
SRLP
DAT4
Bit 4
ID4
UI0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
T_TERM0
UPDW1
WDAT3
ADDR3
SAMP3
PULS3
SCAL3
RMUX
TJA_E
RJA_E
MON3
LATT3
RO20
T1/J1
LOS3
DAT3
Bit 3
ID3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R_TERM2
TJA_DP1
RJA_DP1
LEVEL0
UPDW0
DF_IES
ADDR2
SAMP2
WDAT2
EXZ_IE
118
PULS2
SCAL2
LATT2
DF_IE
LOS2
DF_S
DAT2
Bit 2
FM1
RLP
LAC
ID2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
R_TERM1
RJA_DP0
TJA_DP0
CNT_MD
TSLVCK
ADDR1
SAMP1
WDAT1
PULS1
SCAL1
RAISE
LATT1
CV_IE
DAT1
LOS1
Bit 1
INT2
MG1
FM0
ALP
ID1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
CNT_TRF Maintenance Function Control 2
R_TERM0 Transmit And Receive Termina-
TEMODE T1/J1 Or E1 Mode
LOS_IES Interrupt Trigger Edges Select
TJA_BW
RJA_BW
TMOVE
LOS_IE
CNT_IE
ADDR0
SAMP0
WDAT0
TMOVI
PULS0
SCAL0
LOS_S
MON0
TMUX
R_MD
LATT0
T_MD
RO10
LOS0
ATAO
DAT0
DIR0
Bit 0
INT1
MG0
DLP
ID0
-
-
-
-
-
-
Chip ID For Dual Transceiver
Reserved
Software Reset
G.772 Monitor Control
GPIO Control
Reference Clock Output Select
Reserved
Interrupt Requisition Link ID
Timer Interrupt Control
Timer Interrupt Indication
Reserved
PMON Access Port
PMON Access Data
Backplane Global Configuration
Reserved
Transmit Jitter Attenuation Con-
figuration
Transmit Configuration 0
Transmit Configuration 1
Transmit Configuration 2
Transmit Configuration 3
Transmit Configuration 4
Receive Jitter Attenuation Con-
figuration
Receive Configuration 0
Receive Configuration 1
Receive Configuration 2
Maintenance Function Control 0
Maintenance Function Control 1
Reserved
tion Configuration
Interrupt Enable Control 0
Interrupt Enable Control 1
Line Status Register 0
Line Status Register 1
Register Name
August 20, 2009
Reference
P 240
P 240
P 241
P 242
P 243
P 244
P 244
P 244
P 245
P 245
P 246
P 125
P 247
P 248
P 249
P 250
P 251
P 252
P 253
P 254
P 255
P 256
P 257
P 258
P 259
P 260
P 260
P 261
P 262
P 262
P 263
Page
-
-
-
-
-