IDT82P2282PF IDT, Integrated Device Technology Inc, IDT82P2282PF Datasheet - Page 337

• Manufacturer Part Number: IDT82P2282PF
• Description: TXRX T1/J1/E1 2CHAN 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Transceiverr

Specifications of IDT82P2282PF

• Number Of Drivers/receivers: 2/2
• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Screening Level: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82P2282PF

E1 RPLC Configuration (0D0H, 1D0H)
SIGSNAP:
naling bits of the current whole Signaling Multi-frame.
GSTRKEN:
timeslot.
51~5FH).
GSUBST[2:0]:
Programming Information
IDT82P2282
GSUBST[2:0]
Bit Name
the others
Default
Bit No.
Type
This bit is valid when Signaling Multi-frame is in synchronization.
= 0: Disable the signaling snapshot.
= 1: Enable the signaling snapshot. That is, the signaling bits of the first Basic frame are locked and output on the RSIGn/MRSIG pin as the sig-
= 0: The replacement is performed on a per-timeslot basis by setting the STRKEN bit (b4, E1-ID-41~4FH & 51~5FH) in the corresponding
= 1: The signaling bits (ABCD) of all timeslots are replaced by the signaling trunk conditioning code in the A,B,C,D bits (b3~0, E1-ID-41~4FH &
These bits select the replacement of all the timeslots.
000
001
010
011
The replacement is performed on a per-timeslot basis by setting the SUBST[2:0] bits (b7~5, E1-ID-00~1FH) in the corresponding timeslot.
The data of all timeslots is replaced by the data trunk code set in the DTRK[7:0] bits (b7~0, E1-ID-20~3FH).
The data of all timeslots is replaced by the A-Law digital milliwatt pattern.
The data of all timeslots is replaced by the µ-Law digital milliwatt pattern.
Reserved.
SIGSNAP
R/W
7
0
GSTRKEN
R/W
6
0
5
Reserved
4
Replacement Selection
337
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
3
GSUBST2
R/W
2
0
GSUBST1
R/W
1
0
August 20, 2009
GSUBST0
R/W
0
0