IDT82P2282PF IDT, Integrated Device Technology Inc, IDT82P2282PF Datasheet - Page 6

• Manufacturer Part Number: IDT82P2282PF
• Description: TXRX T1/J1/E1 2CHAN 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Transceiverr

Specifications of IDT82P2282PF

• Number Of Drivers/receivers: 2/2
• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Screening Level: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82P2282PF

IDT82P2282
4 OPERATION ................................................................................................................................................................... 108
5 PROGRAMMING INFORMATION .................................................................................................................................. 112
6 IEEE STD 1149.1 JTAG TEST ACCESS PORT ............................................................................................................ 357
7 PHYSICAL AND ELECTRICAL SPECIFICATIONS ...................................................................................................... 364
Table of Contents
4.1 POWER-ON SEQUENCE ............................................................................................................................................................................ 108
4.2 RESET ......................................................................................................................................................................................................... 108
4.3 RECEIVE / TRANSMIT PATH POWER DOWN .......................................................................................................................................... 108
4.4 MICROPROCESSOR INTERFACE ............................................................................................................................................................ 109
4.5 INDIRECT REGISTER ACCESS SCHEME ................................................................................................................................................ 111
5.1 REGISTER MAP .......................................................................................................................................................................................... 112
5.2 REGISTER DESCRIPTION ......................................................................................................................................................................... 125
6.1 JTAG INSTRUCTIONS AND INSTRUCTION REGISTER (IR) ................................................................................................................... 358
6.2 JTAG DATA REGISTER ............................................................................................................................................................................. 359
6.3 TEST ACCESS PORT CONTROLLER ....................................................................................................................................................... 361
7.1 ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................. 364
7.2 RECOMMENDED OPERATING CONDITIONS .......................................................................................................................................... 364
7.3 D.C. CHARACTERISTICS .......................................................................................................................................................................... 365
7.4 DIGITAL I/O TIMING CHARACTERISTICS ................................................................................................................................................ 366
7.5 CLOCK FREQUENCY REQUIREMENT ..................................................................................................................................................... 367
7.6 T1/J1 LINE RECEIVER ELECTRICAL CHARACTERISTICS .................................................................................................................... 368
7.7 E1 LINE RECEIVER ELECTRICAL CHARACTERISTICS ......................................................................................................................... 369
7.8 T1/J1 LINE TRANSMITTER ELECTRICAL CHARACTERISTICS ............................................................................................................. 370
7.9 E1 LINE TRANSMITTER ELECTRICAL CHARACTERISTICS ................................................................................................................. 371
7.10 JITTER TOLERANCE ................................................................................................................................................................................. 372
7.11 JITTER TRANSFER .................................................................................................................................................................................... 374
7.12 MICROPROCESSOR TIMING SPECIFICATION ........................................................................................................................................ 376
4.4.1
4.4.2
4.5.1
4.5.2
5.1.1
5.1.2
5.2.1
5.2.2
6.2.1
6.2.2
6.2.3
7.4.1
7.4.2
7.10.1 T1/J1 Mode .................................................................................................................................................................................... 372
7.10.2 E1 Mode ........................................................................................................................................................................................ 373
7.11.1 T1/J1 Mode .................................................................................................................................................................................... 374
7.11.2 E1 Mode ........................................................................................................................................................................................ 375
7.12.1 Motorola Non-Multiplexed Mode ................................................................................................................................................. 376
SPI Mode ....................................................................................................................................................................................... 109
Parallel Microprocessor Interface .............................................................................................................................................. 110
Indirect Register Read Access ................................................................................................................................................... 111
Indirect Register Write Access ................................................................................................................................................... 111
T1/J1 Mode .................................................................................................................................................................................... 112
5.1.1.1
5.1.1.2
E1 Mode ........................................................................................................................................................................................ 118
5.1.2.1
5.1.2.2
T1/J1 Mode .................................................................................................................................................................................... 126
5.2.1.1
5.2.1.2
E1 Mode ........................................................................................................................................................................................ 240
5.2.2.1
5.2.2.2
Device Identification Register (IDR) ........................................................................................................................................... 359
Bypass Register (BYP) ................................................................................................................................................................ 359
Boundary Scan Register (BSR) ................................................................................................................................................... 359
In Non-Multiplexed Mode ............................................................................................................................................................. 366
In Multiplexed Mode ..................................................................................................................................................................... 367
7.12.1.1 Read Cycle Specification ............................................................................................................................................... 376
Direct Register ................................................................................................................................................................ 112
Indirect Register ............................................................................................................................................................. 117
Direct Register ................................................................................................................................................................ 118
Indirect Register ............................................................................................................................................................. 123
Direct Register ................................................................................................................................................................ 126
Indirect Register ............................................................................................................................................................. 227
Direct Register ................................................................................................................................................................ 240
Indirect Register ............................................................................................................................................................. 342
6
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
August 20, 2009