ST72T774J9B1 STMicroelectronics, ST72T774J9B1 Datasheet - Page 11

• Manufacturer Part Number: ST72T774J9B1
• Manufacturer: STMicroelectronics

Specifications of ST72T774J9B1

• Cpu Family: ST7
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: I2C/USB
• Program Memory Type: EPROM
• Program Memory Size: 60KB
• Total Internal Ram Size: 1KB
• # I/os (max): 31
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4V
• On-chip Adc: 1-chx8-bit
• On-chip Dac: 1-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 42
• Package Type: SPDIP
• Lead Free Status / Rohs Status: Specific Sites Compliant

MEMORY MAP (Cont’d)
Table 2. Hardware Register Memory Map
Address
0000h
0001h
0002h
0003h
0004h
0005h
0006h
0007h
0008h
0009h
000Ah
000Bh
000Ch
000Dh
000Eh
000Fh
00010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0018h
0019h
001Ah
001Bh
001Ch
001Dh
001Eh
001Fh
0020h
to
0024h
Watchdog
ADC
DDC1/2B
TMU
Timer
Block
Register Label
PADR
PADDR
PBDR
PBDDR
PCDR
PCDDR
PDDR
PDDDR
WDGCR
MISCR
ADCDR
ADCCSR
DDCDCR
DDCAHR
TMUCSR
TMUT1CR
TMUT2CR
TIMCR2
TIMCR1
TIMSR
TIMIC1HR
TIMIC1LR
TIMOC1HR
TIMOC1LR
TIMCHR
TIMCLR
TIMACHR
TIMACLR
TIMIC2HR
TIMIC2LR
TIMOC2HR
TIMOC2LR
Port A Data Register
Port A Data Direction Register
Port B Data Register
Port B Data Direction Register
Port C Data Register
Port C Data Direction Register
Port D Data Register
Port D Data Direction Register
Watchdog Control Register
Miscellaneous Register
ADC Data Register
ADC Control Status register
DDC1/2B Control Register
DDC1/2B Address Pointer High Register
TMU control status register
TMU T1 counter register
TMU T2 counter register
Timer Control Register 2
Timer Control Register 1
Timer Status Register
Timer Input Capture 1 High Register
Timer Input Capture 1 Low Register
Timer Output Compare 1 High Register
Timer Output Compare 1 Low Register
Timer Counter High Register
Timer Counter Low Register
Timer Alternate Counter High Register
Timer Alternate Counter Low Register
Timer Input Capture 2 High Register
Timer Input Capture 2 Low Register
Timer Output Compare 2 High Register
Timer Output Compare 2 Low Register
Reserved Area (5 bytes)
Register Name
ST72774/ST727754/ST72734
00h
00h
00h
00h
00h
00h
00h
00h
7Fh
10h
00h
00h
00h
xxh
FCh
FFh
FFh
00h
00h
00h
xxh
xxh
80h
00h
FFh
FCh
FFh
FCh
xxh
xxh
80h
00h
Status
Reset
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Read only
R/W
R/W
R/W
R/W
Read only
Read only
R/W
R/W
Read only
Read only
Read only
R/W
R/W
Read only
R/W
Read only
R/W
Read only
Read only
R/W
R/W
Remarks
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