MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 199

MC9S12C128VFU

Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12C128VFU

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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CAPMOD
DBGBRK
Field
1:0
3
DBG Breakpoint Enable Bit — The DBGBRK bit controls whether the debugger will request a breakpoint based
on comparator A and B to the CPU upon completion of a tracing session. Please refer to
“Breakpoints,” for further details.
0 CPU break request not enabled
1 CPU break request enabled
Capture Mode Field — See
automatically inhibit redundant entries into capture memory. In detail mode, the debugger is storing address and
data for all cycles except program fetch (P) and free (f) cycles. In profile mode, the debugger is returning the
address of the last instruction executed by the CPU on each access of trace buffer address. Refer to
Section 7.4.2.6, “Capture
Table 7-3. DBGC1 Field Descriptions (continued)
Modes,” for more information.
MC9S12C-Family / MC9S12GC-Family
Table 7-4
CAPMOD
Table 7-4. CAPMOD Encoding
00
01
10
11
for capture mode field definitions. In LOOP1 mode, the debugger will
Rev 01.24
Description
Description
PROFILE
LOOP1
DETAIL
Normal
Chapter 7 Debug Module (DBGV1) Block Description
Section 7.4.3,
199

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