MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 362

MC9S12C128VFU

Manufacturer Part Number
MC9S12C128VFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12C128VFU

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
25MHz
Interface Type
CAN/SCI/SPI
Program Memory Type
Flash
Program Memory Size
128KB
Total Internal Ram Size
4KB
# I/os (max)
60
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/2.97V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
PQFP
Lead Free Status / Rohs Status
Not Compliant

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Chapter 12 Pulse-Width Modulator (PWM8B6CV1) Block Description
12.3.2.9
PWMSCLA is the programmable scale value used in scaling clock A to generate clock SA. Clock SA is
generated by taking clock A, dividing it by the value in the PWMSCLA register and dividing that by two.
Any value written to this register will cause the scale counter to load the new scale value (PWMSCLA).
Read: anytime
Write: anytime (causes the scale counter to load the PWMSCLA value)
12.3.2.10 PWM Scale B Register (PWMSCLB)
PWMSCLB is the programmable scale value used in scaling clock B to generate clock SB. Clock SB is
generated by taking clock B, dividing it by the value in the PWMSCLB register and dividing that by two.
Any value written to this register will cause the scale counter to load the new scale value (PWMSCLB).
Read: anytime
Write: anytime (causes the scale counter to load the PWMSCLB value).
362
Module Base + 0x0008
Module Base + 0x0009
Reset
Reset
W
W
R
R
Clock SA = Clock A / (2 * PWMSCLA)
Clock SB = Clock B / (2 * PWMSCLB)
Bit 7
Bit 7
PWM Scale A Register (PWMSCLA)
0
0
7
7
When PWMSCLA = 0x0000, PWMSCLA value is considered a full scale
value of 256. Clock A is thus divided by 512.
When PWMSCLB = 0x0000, PWMSCLB value is considered a full scale
value of 256. Clock B is thus divided by 512.
0
0
6
6
6
6
Figure 12-11. PWM Scale A Register (PWMSCLA)
Figure 12-12. PWM Scale B Register (PWMSCLB)
MC9S12C-Family / MC9S12GC-Family
0
0
5
5
5
5
Rev 01.24
NOTE
NOTE
0
0
4
4
4
4
0
0
3
3
3
3
0
0
2
2
2
2
Freescale Semiconductor
0
0
1
1
1
1
Bit 0
Bit 0
0
0
0
0

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